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rcar_gen3: drivers: ddr: Update DDR setting for H3, M3, M3N 

[IPL/DDR]
- Update H3, M3, M3N DDR setting rev.0.40.

Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> # upstream update
Change-Id: If675796a2314e769602af21bf5cc6b10962d4f29
This commit is contained in:
Chiaki Fujii 2019-12-26 12:57:40 +09:00 committed by Marek Vasut
parent 1f420077b6
commit cc4e7ad49e
2 changed files with 3 additions and 3 deletions
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4
drivers/renesas/rcar/ddr/ddr_b/boot_init_dram.c
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@ -2080,8 +2080,8 @@ static void dbsc_regset(void)
/* DBTR9.TRDPR : tRTP */
mmio_write_32(DBSC_DBTR(9), js2[js2_trtp]);
/* DBTR10.TWR : nWR + 1 */
mmio_write_32(DBSC_DBTR(10), js1[js1_ind].nwr + 1);
/* DBTR10.TWR : nWR */
mmio_write_32(DBSC_DBTR(10), js1[js1_ind].nwr);
/*
* DBTR11.TRDWR : RL + BL / 2 + Rounddown(tRPST) + PHY_ODTLoff -

2
drivers/renesas/rcar/ddr/ddr_b/boot_init_dram_regdef.h
View File

@ -5,7 +5,7 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
#define RCAR_DDR_VERSION "rev.0.39"
#define RCAR_DDR_VERSION "rev.0.40"
#define DRAM_CH_CNT 0x04
#define SLICE_CNT 0x04
#define CS_CNT 0x02