Merge pull request #1255 from masahir0y/int-ll64

Use consistent int-ll64 typedefs for aarch32 and aarch64

bl32/tsp/tsp_interrupt.c

@@ -33,7 +33,7 @@ void tsp_update_sync_sel1_intr_stats(uint32_t type, uint64_t elr_el3)
 
 #if LOG_LEVEL >= LOG_LEVEL_VERBOSE
 	spin_lock(&console_lock);
-	VERBOSE("TSP: cpu 0x%lx sync s-el1 interrupt request from 0x%lx\n",
+	VERBOSE("TSP: cpu 0x%lx sync s-el1 interrupt request from 0x%llx\n",
 		read_mpidr(), elr_el3);
 	VERBOSE("TSP: cpu 0x%lx: %d sync s-el1 interrupt requests,"
 		" %d sync s-el1 interrupt returns\n",

bl32/tsp/tsp_main.c

@@ -247,7 +247,7 @@ tsp_args_t *tsp_cpu_resume_main(uint64_t max_off_pwrlvl,
 
 #if LOG_LEVEL >= LOG_LEVEL_INFO
 	spin_lock(&console_lock);
-	INFO("TSP: cpu 0x%lx resumed. maximum off power level %ld\n",
+	INFO("TSP: cpu 0x%lx resumed. maximum off power level %lld\n",
 	     read_mpidr(), max_off_pwrlvl);
 	INFO("TSP: cpu 0x%lx: %d smcs, %d erets %d cpu suspend requests\n",
 		read_mpidr(),
@@ -347,7 +347,7 @@ tsp_args_t *tsp_smc_handler(uint64_t func,
 	tsp_stats[linear_id].smc_count++;
 	tsp_stats[linear_id].eret_count++;
 
-	INFO("TSP: cpu 0x%lx received %s smc 0x%lx\n", read_mpidr(),
+	INFO("TSP: cpu 0x%lx received %s smc 0x%llx\n", read_mpidr(),
 		((func >> 31) & 1) == 1 ? "fast" : "yielding",
 		func);
 	INFO("TSP: cpu 0x%lx: %d smcs, %d erets\n", read_mpidr(),

drivers/arm/gic/gic_v3.c

@@ -8,7 +8,7 @@
 #include <debug.h>
 #include <gic_v3.h>
 
-uintptr_t gicv3_get_rdist(uintptr_t gicr_base, uint64_t mpidr)
+uintptr_t gicv3_get_rdist(uintptr_t gicr_base, u_register_t mpidr)
 {
 	uint32_t  cpu_aff, gicr_aff;
 	uint64_t  gicr_typer;

include/lib/aarch64/arch_helpers.h

@@ -18,15 +18,15 @@
  *********************************************************************/
 
 #define _DEFINE_SYSREG_READ_FUNC(_name, _reg_name)		\
-static inline uint64_t read_ ## _name(void)			\
+static inline u_register_t read_ ## _name(void)			\
 {								\
-	uint64_t v;						\
+	u_register_t v;						\
 	__asm__ volatile ("mrs %0, " #_reg_name : "=r" (v));	\
 	return v;						\
 }
 
 #define _DEFINE_SYSREG_WRITE_FUNC(_name, _reg_name)			\
-static inline void write_ ## _name(uint64_t v)				\
+static inline void write_ ## _name(u_register_t v)			\
 {									\
 	__asm__ volatile ("msr " #_reg_name ", %0" : : "r" (v));	\
 }

include/lib/stdlib/machine/_types.h

@@ -52,56 +52,19 @@ typedef	short			__int16_t;
 typedef	unsigned short		__uint16_t;
 typedef	int			__int32_t;
 typedef	unsigned int		__uint32_t;
-
-
-/*
- * Standard type definitions which are different in AArch64 and AArch32
- */
-#ifdef	AARCH32
 typedef	long long		__int64_t;
 typedef	unsigned long long	__uint64_t;
-typedef	__int32_t	__critical_t;
-typedef	__int32_t	__intfptr_t;
-typedef	__int32_t	__intptr_t;
-typedef	__int32_t	__ptrdiff_t;		/* ptr1 - ptr2 */
-typedef	__int32_t	__register_t;
-typedef	__int32_t	__segsz_t;		/* segment size (in pages) */
-typedef	__uint32_t	__size_t;		/* sizeof() */
-typedef	__int32_t	__ssize_t;		/* byte count or error */
-typedef	__uint32_t	__uintfptr_t;
-typedef	__uint32_t	__uintptr_t;
-typedef	__uint32_t	__u_register_t;
-typedef	__uint32_t	__vm_offset_t;
-typedef	__uint32_t	__vm_paddr_t;
-typedef	__uint32_t	__vm_size_t;
-#elif defined AARCH64
-typedef	long			__int64_t;
-typedef	unsigned long		__uint64_t;
-typedef	__int64_t	__critical_t;
-typedef	__int64_t	__intfptr_t;
-typedef	__int64_t	__intptr_t;
-typedef	__int64_t	__ptrdiff_t;		/* ptr1 - ptr2 */
-typedef	__int64_t	__register_t;
-typedef	__int64_t	__segsz_t;		/* segment size (in pages) */
-typedef	__uint64_t	__size_t;		/* sizeof() */
-typedef	__int64_t	__ssize_t;		/* byte count or error */
-typedef	__uint64_t	__uintfptr_t;
-typedef	__uint64_t	__uintptr_t;
-typedef	__uint64_t	__u_register_t;
-typedef	__uint64_t	__vm_offset_t;
-typedef	__uint64_t	__vm_paddr_t;
-typedef	__uint64_t	__vm_size_t;
-#else
-#error "Only AArch32 or AArch64 supported"
-#endif /* AARCH32 */
 
 /*
  * Standard type definitions.
  */
 typedef	__int32_t	__clock_t;		/* clock()... */
+typedef	long		__critical_t;
 typedef	double		__double_t;
 typedef	float		__float_t;
+typedef	long		__intfptr_t;
 typedef	__int64_t	__intmax_t;
+typedef	long		__intptr_t;
 typedef	__int32_t	__int_fast8_t;
 typedef	__int32_t	__int_fast16_t;
 typedef	__int32_t	__int_fast32_t;
@@ -110,8 +73,22 @@ typedef	__int8_t	__int_least8_t;
 typedef	__int16_t	__int_least16_t;
 typedef	__int32_t	__int_least32_t;
 typedef	__int64_t	__int_least64_t;
+typedef	long		__ptrdiff_t;		/* ptr1 - ptr2 */
+typedef	long		__register_t;
+typedef	long		__segsz_t;		/* segment size (in pages) */
+#ifdef	AARCH32
+typedef	unsigned int	__size_t;		/* sizeof() */
+typedef	int		__ssize_t;		/* byte count or error */
+#elif defined AARCH64
+typedef	unsigned long	__size_t;		/* sizeof() */
+typedef	long		__ssize_t;		/* byte count or error */
+#else
+#error "Only AArch32 or AArch64 supported"
+#endif /* AARCH32 */
 typedef	__int64_t	__time_t;		/* time()... */
+typedef	unsigned long	__uintfptr_t;
 typedef	__uint64_t	__uintmax_t;
+typedef	unsigned long	__uintptr_t;
 typedef	__uint32_t	__uint_fast8_t;
 typedef	__uint32_t	__uint_fast16_t;
 typedef	__uint32_t	__uint_fast32_t;
@@ -120,8 +97,12 @@ typedef	__uint8_t	__uint_least8_t;
 typedef	__uint16_t	__uint_least16_t;
 typedef	__uint32_t	__uint_least32_t;
 typedef	__uint64_t	__uint_least64_t;
+typedef	unsigned long	__u_register_t;
+typedef	unsigned long	__vm_offset_t;
 typedef	__int64_t	__vm_ooffset_t;
+typedef	unsigned long	__vm_paddr_t;
 typedef	__uint64_t	__vm_pindex_t;
+typedef	unsigned long	__vm_size_t;
 
 /*
  * Unusual type definitions.

plat/common/aarch64/plat_common.c

@@ -93,7 +93,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
  */
 void plat_sdei_handle_masked_trigger(uint64_t mpidr, unsigned int intr)
 {
-	WARN("Spurious SDEI interrupt %u on masked PE %lx\n", intr, mpidr);
+	WARN("Spurious SDEI interrupt %u on masked PE %llx\n", intr, mpidr);
 }
 
 /*

plat/hisilicon/hikey/hikey_bl1_setup.c

@@ -172,7 +172,7 @@ void bl1_plat_set_ep_info(unsigned int image_id,
 		__asm__ volatile ("msr	cpacr_el1, %0" : : "r"(data));
 		__asm__ volatile ("mrs	%0, cpacr_el1" : "=r"(data));
 	} while ((data & (3 << 20)) != (3 << 20));
-	INFO("cpacr_el1:0x%lx\n", data);
+	INFO("cpacr_el1:0x%llx\n", data);
 
 	ep_info->args.arg0 = 0xffff & read_mpidr();
 	ep_info->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,

plat/mediatek/common/custom/oem_svc.c

@@ -32,14 +32,14 @@ static int32_t oem_svc_setup(void)
 /*******************************************************************************
  * OEM top level handler for servicing SMCs.
  ******************************************************************************/
-uint64_t oem_smc_handler(uint32_t smc_fid,
+uintptr_t oem_smc_handler(uint32_t smc_fid,
-			uint64_t x1,
+			u_register_t x1,
-			uint64_t x2,
+			u_register_t x2,
-			uint64_t x3,
+			u_register_t x3,
-			uint64_t x4,
+			u_register_t x4,
 			void *cookie,
 			void *handle,
-			uint64_t flags)
+			u_register_t flags)
 {
 	WARN("Unimplemented OEM Call: 0x%x\n", smc_fid);
 	SMC_RET1(handle, SMC_UNK);
@@ -49,14 +49,14 @@ uint64_t oem_smc_handler(uint32_t smc_fid,
  * Top-level OEM Service SMC handler. This handler will in turn dispatch
  * calls to related SMC handler
  */
-uint64_t oem_svc_smc_handler(uint32_t smc_fid,
+uintptr_t oem_svc_smc_handler(uint32_t smc_fid,
-			 uint64_t x1,
+			 u_register_t x1,
-			 uint64_t x2,
+			 u_register_t x2,
-			 uint64_t x3,
+			 u_register_t x3,
-			 uint64_t x4,
+			 u_register_t x4,
 			 void *cookie,
 			 void *handle,
-			 uint64_t flags)
+			 u_register_t flags)
 {
 	/*
 	 * Dispatch OEM calls to OEM Common handler and return its return value

plat/mediatek/common/mtk_plat_common.c

@@ -19,10 +19,10 @@
 struct atf_arg_t gteearg;
 
 void clean_top_32b_of_param(uint32_t smc_fid,
-				uint64_t *px1,
+				u_register_t *px1,
-				uint64_t *px2,
+				u_register_t *px2,
-				uint64_t *px3,
+				u_register_t *px3,
-				uint64_t *px4)
+				u_register_t *px4)
 {
 	/* if parameters from SMC32. Clean top 32 bits */
 	if (0 == (smc_fid & SMC_AARCH64_BIT)) {

plat/mediatek/common/mtk_plat_common.h

@@ -48,10 +48,10 @@ struct mtk_bl_param_t {
 /* Declarations for mtk_plat_common.c */
 uint32_t plat_get_spsr_for_bl32_entry(void);
 uint32_t plat_get_spsr_for_bl33_entry(void);
-void clean_top_32b_of_param(uint32_t smc_fid, uint64_t *x1,
+void clean_top_32b_of_param(uint32_t smc_fid, u_register_t *x1,
-				uint64_t *x2,
+				u_register_t *x2,
-				uint64_t *x3,
+				u_register_t *x3,
-				uint64_t *x4);
+				u_register_t *x4);
 void bl31_prepare_kernel_entry(uint64_t k32_64);
 void enable_ns_access_to_cpuectlr(void);
 void boot_to_kernel(uint64_t x1, uint64_t x2, uint64_t x3, uint64_t x4);

plat/mediatek/common/mtk_sip_svc.c

@@ -19,14 +19,14 @@ DEFINE_SVC_UUID(mtk_sip_svc_uid,
 		0x8f, 0x95, 0x05, 0x00, 0x0f, 0x3d);
 
 #pragma weak mediatek_plat_sip_handler
-uint64_t mediatek_plat_sip_handler(uint32_t smc_fid,
+uintptr_t mediatek_plat_sip_handler(uint32_t smc_fid,
-				uint64_t x1,
+				u_register_t x1,
-				uint64_t x2,
+				u_register_t x2,
-				uint64_t x3,
+				u_register_t x3,
-				uint64_t x4,
+				u_register_t x4,
 				void *cookie,
 				void *handle,
-				uint64_t flags)
+				u_register_t flags)
 {
 	ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
 	SMC_RET1(handle, SMC_UNK);
@@ -34,14 +34,14 @@ uint64_t mediatek_plat_sip_handler(uint32_t smc_fid,
 
 /*
  * This function handles Mediatek defined SiP Calls */
-uint64_t mediatek_sip_handler(uint32_t smc_fid,
+uintptr_t mediatek_sip_handler(uint32_t smc_fid,
-			uint64_t x1,
+			u_register_t x1,
-			uint64_t x2,
+			u_register_t x2,
-			uint64_t x3,
+			u_register_t x3,
-			uint64_t x4,
+			u_register_t x4,
 			void *cookie,
 			void *handle,
-			uint64_t flags)
+			u_register_t flags)
 {
 	uint32_t ns;
 
@@ -85,14 +85,14 @@ uint64_t mediatek_sip_handler(uint32_t smc_fid,
 /*
  * This function is responsible for handling all SiP calls from the NS world
  */
-uint64_t sip_smc_handler(uint32_t smc_fid,
+uintptr_t sip_smc_handler(uint32_t smc_fid,
-			 uint64_t x1,
+			 u_register_t x1,
-			 uint64_t x2,
+			 u_register_t x2,
-			 uint64_t x3,
+			 u_register_t x3,
-			 uint64_t x4,
+			 u_register_t x4,
 			 void *cookie,
 			 void *handle,
-			 uint64_t flags)
+			 u_register_t flags)
 {
 	switch (smc_fid) {
 	case SIP_SVC_CALL_COUNT:

plat/nvidia/tegra/common/tegra_sip_calls.c

@@ -49,14 +49,14 @@ int plat_sip_handler(uint32_t smc_fid,
 /*******************************************************************************
  * This function is responsible for handling all SiP calls
  ******************************************************************************/
-uint64_t tegra_sip_handler(uint32_t smc_fid,
+uintptr_t tegra_sip_handler(uint32_t smc_fid,
-			   uint64_t x1,
+			    u_register_t x1,
-			   uint64_t x2,
+			    u_register_t x2,
-			   uint64_t x3,
+			    u_register_t x3,
-			   uint64_t x4,
+			    u_register_t x4,
-			   void *cookie,
+			    void *cookie,
-			   void *handle,
+			    void *handle,
-			   uint64_t flags)
+			    u_register_t flags)
 {
 	uint32_t regval;
 	int err;

plat/nvidia/tegra/soc/t186/drivers/mce/mce.c

@@ -382,7 +382,7 @@ int32_t mce_command_handler(uint64_t cmd, uint64_t arg0, uint64_t arg1,
 		break;
 
 	default:
-		ERROR("unknown MCE command (%lu)\n", cmd);
+		ERROR("unknown MCE command (%llu)\n", cmd);
 		ret = EINVAL;
 		break;
 	}

plat/rockchip/common/params_setup.c

@@ -92,7 +92,7 @@ void params_early_setup(void *plat_param_from_bl2)
 			break;
 #endif
 		default:
-			ERROR("not expected type found %ld\n",
+			ERROR("not expected type found %lld\n",
 			      bl2_param->type);
 			break;
 		}

plat/rockchip/common/rockchip_sip_svc.c

@@ -18,14 +18,14 @@ DEFINE_SVC_UUID(rk_sip_svc_uid,
 		0x8f, 0x88, 0xee, 0x74, 0x7b, 0x72);
 
 #pragma weak rockchip_plat_sip_handler
-uint64_t rockchip_plat_sip_handler(uint32_t smc_fid,
+uintptr_t rockchip_plat_sip_handler(uint32_t smc_fid,
-				   uint64_t x1,
+				    u_register_t x1,
-				   uint64_t x2,
+				    u_register_t x2,
-				   uint64_t x3,
+				    u_register_t x3,
-				   uint64_t x4,
+				    u_register_t x4,
-				   void *cookie,
+				    void *cookie,
-				   void *handle,
+				    void *handle,
-				   uint64_t flags)
+				    u_register_t flags)
 {
 	ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
 	SMC_RET1(handle, SMC_UNK);
@@ -34,14 +34,14 @@ uint64_t rockchip_plat_sip_handler(uint32_t smc_fid,
 /*
  * This function is responsible for handling all SiP calls from the NS world
  */
-uint64_t sip_smc_handler(uint32_t smc_fid,
+uintptr_t sip_smc_handler(uint32_t smc_fid,
-			 uint64_t x1,
+			  u_register_t x1,
-			 uint64_t x2,
+			  u_register_t x2,
-			 uint64_t x3,
+			  u_register_t x3,
-			 uint64_t x4,
+			  u_register_t x4,
-			 void *cookie,
+			  void *cookie,
-			 void *handle,
+			  void *handle,
-			 uint64_t flags)
+			  u_register_t flags)
 {
 	uint32_t ns;
 

plat/rockchip/rk3368/plat_sip_calls.c

@@ -10,14 +10,14 @@
 #include <rockchip_sip_svc.h>
 #include <runtime_svc.h>
 
-uint64_t rockchip_plat_sip_handler(uint32_t smc_fid,
+uintptr_t rockchip_plat_sip_handler(uint32_t smc_fid,
-				   uint64_t x1,
+				   u_register_t x1,
-				   uint64_t x2,
+				   u_register_t x2,
-				   uint64_t x3,
+				   u_register_t x3,
-				   uint64_t x4,
+				   u_register_t x4,
 				   void *cookie,
 				   void *handle,
-				   uint64_t flags)
+				   u_register_t flags)
 {
 	ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
 	SMC_RET1(handle, SMC_UNK);

plat/rockchip/rk3399/plat_sip_calls.c

@@ -47,14 +47,14 @@ uint32_t ddr_smc_handler(uint64_t arg0, uint64_t arg1,
 	return 0;
 }
 
-uint64_t rockchip_plat_sip_handler(uint32_t smc_fid,
+uintptr_t rockchip_plat_sip_handler(uint32_t smc_fid,
-				   uint64_t x1,
+				    u_register_t x1,
-				   uint64_t x2,
+				    u_register_t x2,
-				   uint64_t x3,
+				    u_register_t x3,
-				   uint64_t x4,
+				    u_register_t x4,
-				   void *cookie,
+				    void *cookie,
-				   void *handle,
+				    void *handle,
-				   uint64_t flags)
+				    u_register_t flags)
 {
 	uint64_t x5, x6;
 

plat/xilinx/zynqmp/plat_startup.c

@@ -166,12 +166,12 @@ void fsbl_atf_handover(entry_point_info_t *bl32, entry_point_info_t *bl33)
 	    (ATFHandoffParams->magic[1] != 'L') ||
 	    (ATFHandoffParams->magic[2] != 'N') ||
 	    (ATFHandoffParams->magic[3] != 'X')) {
-		ERROR("BL31: invalid ATF handoff structure at %lx\n",
+		ERROR("BL31: invalid ATF handoff structure at %llx\n",
 		      atf_handoff_addr);
 		panic();
 	}
 
-	VERBOSE("BL31: ATF handoff params at:0x%lx, entries:%u\n",
+	VERBOSE("BL31: ATF handoff params at:0x%llx, entries:%u\n",
 		atf_handoff_addr, ATFHandoffParams->num_entries);
 	if (ATFHandoffParams->num_entries > FSBL_MAX_PARTITIONS) {
 		ERROR("BL31: ATF handoff params: too many partitions (%u/%u)\n",
@@ -189,7 +189,7 @@ void fsbl_atf_handover(entry_point_info_t *bl32, entry_point_info_t *bl33)
 		int target_estate, target_secure;
 		int target_cpu, target_endianness, target_el;
 
-		VERBOSE("BL31: %zd: entry:0x%lx, flags:0x%lx\n", i,
+		VERBOSE("BL31: %zd: entry:0x%llx, flags:0x%llx\n", i,
 			ATFHandoffParams->partition[i].entry_point,
 			ATFHandoffParams->partition[i].flags);
 
@@ -250,7 +250,7 @@ void fsbl_atf_handover(entry_point_info_t *bl32, entry_point_info_t *bl33)
 			}
 		}
 
-		VERBOSE("Setting up %s entry point to:%lx, el:%x\n",
+		VERBOSE("Setting up %s entry point to:%llx, el:%x\n",
 			target_secure == FSBL_FLAGS_SECURE ? "BL32" : "BL33",
 			ATFHandoffParams->partition[i].entry_point,
 			target_el);

plat/xilinx/zynqmp/sip_svc_setup.c

@@ -52,14 +52,14 @@ static int32_t sip_svc_setup(void)
  * Handler for all SiP SMC calls. Handles standard SIP requests
  * and calls PM SMC handler if the call is for a PM-API function.
  */
-uint64_t sip_svc_smc_handler(uint32_t smc_fid,
+uintptr_t sip_svc_smc_handler(uint32_t smc_fid,
-			     uint64_t x1,
+			      u_register_t x1,
-			     uint64_t x2,
+			      u_register_t x2,
-			     uint64_t x3,
+			      u_register_t x3,
-			     uint64_t x4,
+			      u_register_t x4,
-			     void *cookie,
+			      void *cookie,
-			     void *handle,
+			      void *handle,
-			     uint64_t flags)
+			      u_register_t flags)
 {
 	/* Let PM SMC handler deal with PM-related requests */
 	if (is_pm_fid(smc_fid)) {

services/spd/opteed/opteed_main.c

@@ -90,7 +90,7 @@ static uint64_t opteed_sel1_interrupt_handler(uint32_t id,
  * (aarch32/aarch64) if not already known and initialises the context for entry
  * into OPTEE for its initialization.
  ******************************************************************************/
-int32_t opteed_setup(void)
+static int32_t opteed_setup(void)
 {
 	entry_point_info_t *optee_ep_info;
 	uint32_t linear_id;
@@ -187,14 +187,14 @@ static int32_t opteed_init(void)
  * state. Lastly it will also return any information that OPTEE needs to do
  * the work assigned to it.
  ******************************************************************************/
-uint64_t opteed_smc_handler(uint32_t smc_fid,
+static uintptr_t opteed_smc_handler(uint32_t smc_fid,
-			 uint64_t x1,
+			 u_register_t x1,
-			 uint64_t x2,
+			 u_register_t x2,
-			 uint64_t x3,
+			 u_register_t x3,
-			 uint64_t x4,
+			 u_register_t x4,
 			 void *cookie,
 			 void *handle,
-			 uint64_t flags)
+			 u_register_t flags)
 {
 	cpu_context_t *ns_cpu_context;
 	uint32_t linear_id = plat_my_core_pos();

services/spd/opteed/opteed_pm.c

@@ -16,7 +16,7 @@
  * The target cpu is being turned on. Allow the OPTEED/OPTEE to perform any
  * actions needed. Nothing at the moment.
  ******************************************************************************/
-static void opteed_cpu_on_handler(uint64_t target_cpu)
+static void opteed_cpu_on_handler(u_register_t target_cpu)
 {
 }
 
@@ -24,7 +24,7 @@ static void opteed_cpu_on_handler(uint64_t target_cpu)
  * This cpu is being turned off. Allow the OPTEED/OPTEE to perform any actions
  * needed
  ******************************************************************************/
-static int32_t opteed_cpu_off_handler(uint64_t unused)
+static int32_t opteed_cpu_off_handler(u_register_t unused)
 {
 	int32_t rc = 0;
 	uint32_t linear_id = plat_my_core_pos();
@@ -57,7 +57,7 @@ static int32_t opteed_cpu_off_handler(uint64_t unused)
  * This cpu is being suspended. S-EL1 state must have been saved in the
  * resident cpu (mpidr format) if it is a UP/UP migratable OPTEE.
  ******************************************************************************/
-static void opteed_cpu_suspend_handler(uint64_t max_off_pwrlvl)
+static void opteed_cpu_suspend_handler(u_register_t max_off_pwrlvl)
 {
 	int32_t rc = 0;
 	uint32_t linear_id = plat_my_core_pos();
@@ -87,7 +87,7 @@ static void opteed_cpu_suspend_handler(uint64_t max_off_pwrlvl)
  * after initialising minimal architectural state that guarantees safe
  * execution.
  ******************************************************************************/
-static void opteed_cpu_on_finish_handler(uint64_t unused)
+static void opteed_cpu_on_finish_handler(u_register_t unused)
 {
 	int32_t rc = 0;
 	uint32_t linear_id = plat_my_core_pos();
@@ -123,7 +123,7 @@ static void opteed_cpu_on_finish_handler(uint64_t unused)
  * completed the preceding suspend call. Use that context to program an entry
  * into OPTEE to allow it to do any remaining book keeping
  ******************************************************************************/
-static void opteed_cpu_suspend_finish_handler(uint64_t max_off_pwrlvl)
+static void opteed_cpu_suspend_finish_handler(u_register_t max_off_pwrlvl)
 {
 	int32_t rc = 0;
 	uint32_t linear_id = plat_my_core_pos();
@@ -154,7 +154,7 @@ static void opteed_cpu_suspend_finish_handler(uint64_t max_off_pwrlvl)
  * Return the type of OPTEE the OPTEED is dealing with. Report the current
  * resident cpu (mpidr format) if it is a UP/UP migratable OPTEE.
  ******************************************************************************/
-static int32_t opteed_cpu_migrate_info(uint64_t *resident_cpu)
+static int32_t opteed_cpu_migrate_info(u_register_t *resident_cpu)
 {
 	return OPTEE_MIGRATE_INFO;
 }

services/spd/tlkd/tlkd_main.c

@@ -44,14 +44,14 @@ DEFINE_SVC_UUID(tlk_uuid,
 		0xbd11e9c9, 0x2bba, 0x52ee, 0xb1, 0x72,
 		0x46, 0x1f, 0xba, 0x97, 0x7f, 0x63);
 
-int32_t tlkd_init(void);
+static int32_t tlkd_init(void);
 
 /*******************************************************************************
  * Secure Payload Dispatcher setup. The SPD finds out the SP entrypoint and type
  * (aarch32/aarch64) if not already known and initialises the context for entry
  * into the SP for its initialisation.
  ******************************************************************************/
-int32_t tlkd_setup(void)
+static int32_t tlkd_setup(void)
 {
 	entry_point_info_t *tlk_ep_info;
 
@@ -100,7 +100,7 @@ int32_t tlkd_setup(void)
  * used. This function performs a synchronous entry into the Secure payload.
  * The SP passes control back to this routine through a SMC.
  ******************************************************************************/
-int32_t tlkd_init(void)
+static int32_t tlkd_init(void)
 {
 	entry_point_info_t *tlk_entry_point;
 
@@ -133,14 +133,14 @@ int32_t tlkd_init(void)
  * will also return any information that the secure payload needs to do the
  * work assigned to it.
  ******************************************************************************/
-uint64_t tlkd_smc_handler(uint32_t smc_fid,
+static uintptr_t tlkd_smc_handler(uint32_t smc_fid,
-			 uint64_t x1,
+			 u_register_t x1,
-			 uint64_t x2,
+			 u_register_t x2,
-			 uint64_t x3,
+			 u_register_t x3,
-			 uint64_t x4,
+			 u_register_t x4,
 			 void *cookie,
 			 void *handle,
-			 uint64_t flags)
+			 u_register_t flags)
 {
 	cpu_context_t *ns_cpu_context;
 	gp_regs_t *gp_regs;

services/spd/tlkd/tlkd_pm.c

@@ -22,7 +22,7 @@ extern tlk_context_t tlk_ctx;
  * Return the type of payload TLKD is dealing with. Report the current
  * resident cpu (mpidr format) if it is a UP/UP migratable payload.
  ******************************************************************************/
-static int32_t cpu_migrate_info(uint64_t *resident_cpu)
+static int32_t cpu_migrate_info(u_register_t *resident_cpu)
 {
 	/* the payload runs only on CPU0 */
 	*resident_cpu = MPIDR_CPU0;
@@ -35,7 +35,7 @@ static int32_t cpu_migrate_info(uint64_t *resident_cpu)
  * This cpu is being suspended. Inform TLK of the SYSTEM_SUSPEND event, so
  * that it can pass this information to its Trusted Apps.
  ******************************************************************************/
-static void cpu_suspend_handler(uint64_t suspend_level)
+static void cpu_suspend_handler(u_register_t suspend_level)
 {
 	gp_regs_t *gp_regs;
 	int cpu = read_mpidr() & MPIDR_CPU_MASK;
@@ -67,7 +67,7 @@ static void cpu_suspend_handler(uint64_t suspend_level)
  * This cpu is being resumed. Inform TLK of the SYSTEM_SUSPEND exit, so
  * that it can pass this information to its Trusted Apps.
  ******************************************************************************/
-static void cpu_resume_handler(uint64_t suspend_level)
+static void cpu_resume_handler(u_register_t suspend_level)
 {
 	gp_regs_t *gp_regs;
 	int cpu = read_mpidr() & MPIDR_CPU_MASK;

services/spd/trusty/trusty.c

@@ -53,7 +53,7 @@ struct args {
 	uint64_t	r7;
 };
 
-struct trusty_cpu_ctx trusty_cpu_ctx[PLATFORM_CORE_COUNT];
+static struct trusty_cpu_ctx trusty_cpu_ctx[PLATFORM_CORE_COUNT];
 
 struct args trusty_init_context_stack(void **sp, void *new_stack);
 struct args trusty_context_switch_helper(void **sp, void *smc_params);
@@ -159,7 +159,7 @@ static uint64_t trusty_set_fiq_handler(void *handle, uint64_t cpu,
 	struct trusty_cpu_ctx *ctx;
 
 	if (cpu >= PLATFORM_CORE_COUNT) {
-		ERROR("%s: cpu %ld >= %d\n", __func__, cpu, PLATFORM_CORE_COUNT);
+		ERROR("%s: cpu %lld >= %d\n", __func__, cpu, PLATFORM_CORE_COUNT);
 		return SM_ERR_INVALID_PARAMETERS;
 	}
 
@@ -191,7 +191,7 @@ static uint64_t trusty_fiq_exit(void *handle, uint64_t x1, uint64_t x2, uint64_t
 
 	ret = trusty_context_switch(NON_SECURE, SMC_FC_FIQ_EXIT, 0, 0, 0);
 	if (ret.r0 != 1) {
-		INFO("%s(%p) SMC_FC_FIQ_EXIT returned unexpected value, %ld\n",
+		INFO("%s(%p) SMC_FC_FIQ_EXIT returned unexpected value, %lld\n",
 		       __func__, handle, ret.r0);
 	}
 
@@ -212,14 +212,14 @@ static uint64_t trusty_fiq_exit(void *handle, uint64_t x1, uint64_t x2, uint64_t
 	SMC_RET0(handle);
 }
 
-static uint64_t trusty_smc_handler(uint32_t smc_fid,
+static uintptr_t trusty_smc_handler(uint32_t smc_fid,
-			 uint64_t x1,
+			 u_register_t x1,
-			 uint64_t x2,
+			 u_register_t x2,
-			 uint64_t x3,
+			 u_register_t x3,
-			 uint64_t x4,
+			 u_register_t x4,
 			 void *cookie,
 			 void *handle,
-			 uint64_t flags)
+			 u_register_t flags)
 {
 	struct args ret;
 	uint32_t vmid = 0;
@@ -331,7 +331,7 @@ static void trusty_cpu_suspend(uint32_t off)
 
 	ret = trusty_context_switch(NON_SECURE, SMC_FC_CPU_SUSPEND, off, 0, 0);
 	if (ret.r0 != 0) {
-		INFO("%s: cpu %d, SMC_FC_CPU_SUSPEND returned unexpected value, %ld\n",
+		INFO("%s: cpu %d, SMC_FC_CPU_SUSPEND returned unexpected value, %lld\n",
 		     __func__, plat_my_core_pos(), ret.r0);
 	}
 }
@@ -342,19 +342,19 @@ static void trusty_cpu_resume(uint32_t on)
 
 	ret = trusty_context_switch(NON_SECURE, SMC_FC_CPU_RESUME, on, 0, 0);
 	if (ret.r0 != 0) {
-		INFO("%s: cpu %d, SMC_FC_CPU_RESUME returned unexpected value, %ld\n",
+		INFO("%s: cpu %d, SMC_FC_CPU_RESUME returned unexpected value, %lld\n",
 		     __func__, plat_my_core_pos(), ret.r0);
 	}
 }
 
-static int32_t trusty_cpu_off_handler(uint64_t unused)
+static int32_t trusty_cpu_off_handler(u_register_t unused)
 {
 	trusty_cpu_suspend(1);
 
 	return 0;
 }
 
-static void trusty_cpu_on_finish_handler(uint64_t unused)
+static void trusty_cpu_on_finish_handler(u_register_t unused)
 {
 	struct trusty_cpu_ctx *ctx = get_trusty_ctx();
 
@@ -365,12 +365,12 @@ static void trusty_cpu_on_finish_handler(uint64_t unused)
 	}
 }
 
-static void trusty_cpu_suspend_handler(uint64_t unused)
+static void trusty_cpu_suspend_handler(u_register_t unused)
 {
 	trusty_cpu_suspend(0);
 }
 
-static void trusty_cpu_suspend_finish_handler(uint64_t unused)
+static void trusty_cpu_suspend_finish_handler(u_register_t unused)
 {
 	trusty_cpu_resume(0);
 }

services/spd/tspd/tspd_main.c

@@ -179,7 +179,7 @@ static uint64_t tspd_ns_interrupt_handler(uint32_t id,
  * (aarch32/aarch64) if not already known and initialises the context for entry
  * into the SP for its initialisation.
  ******************************************************************************/
-int32_t tspd_setup(void)
+static int32_t tspd_setup(void)
 {
 	entry_point_info_t *tsp_ep_info;
 	uint32_t linear_id;
@@ -273,14 +273,14 @@ int32_t tspd_init(void)
  * will also return any information that the secure payload needs to do the
  * work assigned to it.
  ******************************************************************************/
-uint64_t tspd_smc_handler(uint32_t smc_fid,
+static uintptr_t tspd_smc_handler(uint32_t smc_fid,
-			 uint64_t x1,
+			 u_register_t x1,
-			 uint64_t x2,
+			 u_register_t x2,
-			 uint64_t x3,
+			 u_register_t x3,
-			 uint64_t x4,
+			 u_register_t x4,
 			 void *cookie,
 			 void *handle,
-			 uint64_t flags)
+			 u_register_t flags)
 {
 	cpu_context_t *ns_cpu_context;
 	uint32_t linear_id = plat_my_core_pos(), ns;

services/spd/tspd/tspd_pm.c

@@ -17,7 +17,7 @@
  * The target cpu is being turned on. Allow the TSPD/TSP to perform any actions
  * needed. Nothing at the moment.
  ******************************************************************************/
-static void tspd_cpu_on_handler(uint64_t target_cpu)
+static void tspd_cpu_on_handler(u_register_t target_cpu)
 {
 }
 
@@ -25,7 +25,7 @@ static void tspd_cpu_on_handler(uint64_t target_cpu)
  * This cpu is being turned off. Allow the TSPD/TSP to perform any actions
  * needed
  ******************************************************************************/
-static int32_t tspd_cpu_off_handler(uint64_t unused)
+static int32_t tspd_cpu_off_handler(u_register_t unused)
 {
 	int32_t rc = 0;
 	uint32_t linear_id = plat_my_core_pos();
@@ -64,7 +64,7 @@ static int32_t tspd_cpu_off_handler(uint64_t unused)
  * This cpu is being suspended. S-EL1 state must have been saved in the
  * resident cpu (mpidr format) if it is a UP/UP migratable TSP.
  ******************************************************************************/
-static void tspd_cpu_suspend_handler(uint64_t max_off_pwrlvl)
+static void tspd_cpu_suspend_handler(u_register_t max_off_pwrlvl)
 {
 	int32_t rc = 0;
 	uint32_t linear_id = plat_my_core_pos();
@@ -100,7 +100,7 @@ static void tspd_cpu_suspend_handler(uint64_t max_off_pwrlvl)
  * after initialising minimal architectural state that guarantees safe
  * execution.
  ******************************************************************************/
-static void tspd_cpu_on_finish_handler(uint64_t unused)
+static void tspd_cpu_on_finish_handler(u_register_t unused)
 {
 	int32_t rc = 0;
 	uint32_t linear_id = plat_my_core_pos();
@@ -145,7 +145,7 @@ static void tspd_cpu_on_finish_handler(uint64_t unused)
  * completed the preceding suspend call. Use that context to program an entry
  * into the TSP to allow it to do any remaining book keeping
  ******************************************************************************/
-static void tspd_cpu_suspend_finish_handler(uint64_t max_off_pwrlvl)
+static void tspd_cpu_suspend_finish_handler(u_register_t max_off_pwrlvl)
 {
 	int32_t rc = 0;
 	uint32_t linear_id = plat_my_core_pos();
@@ -176,7 +176,7 @@ static void tspd_cpu_suspend_finish_handler(uint64_t max_off_pwrlvl)
  * Return the type of TSP the TSPD is dealing with. Report the current resident
  * cpu (mpidr format) if it is a UP/UP migratable TSP.
  ******************************************************************************/
-static int32_t tspd_cpu_migrate_info(uint64_t *resident_cpu)
+static int32_t tspd_cpu_migrate_info(u_register_t *resident_cpu)
 {
 	return TSP_MIGRATE_INFO;
 }

services/spd/tspd/tspd_private.h

@@ -221,16 +221,6 @@ void tspd_init_tsp_ep_state(struct entry_point_info *tsp_entry_point,
 				tsp_context_t *tsp_ctx);
 int tspd_abort_preempted_smc(tsp_context_t *tsp_ctx);
 
-uint64_t tspd_smc_handler(uint32_t smc_fid,
-			 uint64_t x1,
-			 uint64_t x2,
-			 uint64_t x3,
-			 uint64_t x4,
-			 void *cookie,
-			 void *handle,
-			 uint64_t flags);
-
-int32_t tspd_setup(void);
 uint64_t tspd_handle_sp_preemption(void *handle);
 
 extern tsp_context_t tspd_sp_context[TSPD_CORE_COUNT];