From ccdc044acfced5ae754d865b41e3064ff96f2d0c Mon Sep 17 00:00:00 2001 From: Xing Zheng Date: Tue, 14 Feb 2017 18:03:20 +0800 Subject: [PATCH] rockchip: rk3399: enable secure accessing for SRAM Sorry to miss the security configuration for SRAM, if we don't support it, somebody may modify the comment of SRAM in the non-secure space. Let's fix this issue. Signed-off-by: Xing Zheng --- plat/rockchip/rk3399/drivers/secure/secure.c | 2 +- plat/rockchip/rk3399/drivers/secure/secure.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/plat/rockchip/rk3399/drivers/secure/secure.c b/plat/rockchip/rk3399/drivers/secure/secure.c index f2e9ab03d..d3c8cb8a0 100644 --- a/plat/rockchip/rk3399/drivers/secure/secure.c +++ b/plat/rockchip/rk3399/drivers/secure/secure.c @@ -163,7 +163,7 @@ void secure_sgrf_init(void) mmio_write_32(SGRF_BASE + SGRF_SLV_SECURE_CON0_4(3), SGRF_SLV_S_WMSK | SGRF_SLV_S_ALL_NS); mmio_write_32(SGRF_BASE + SGRF_SLV_SECURE_CON0_4(4), - SGRF_SLV_S_WMSK | SGRF_SLV_S_ALL_NS); + SGRF_SLV_S_WMSK | SGRF_INTSRAM_S); } void secure_sgrf_ddr_rgn_init(void) diff --git a/plat/rockchip/rk3399/drivers/secure/secure.h b/plat/rockchip/rk3399/drivers/secure/secure.h index 6eb2237c4..12a875c8f 100644 --- a/plat/rockchip/rk3399/drivers/secure/secure.h +++ b/plat/rockchip/rk3399/drivers/secure/secure.h @@ -62,6 +62,8 @@ #define SGRF_PMUSRAM_S BIT(8) +#define SGRF_INTSRAM_S BIT(13) + /* ddr region */ #define SGRF_DDR_RGN_0_16_WMSK 0x0fff /* DDR RGN 0~16 size mask */