plat/arm: mhu: make mhu driver generic

MHU doorbell driver requires arm platform specific
macro "PLAT_CSS_MHU_BASE".
Rename it to "PLAT_MHUV2_BASE", so that platforms other than arm
can use generic MHU doorbell driver.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
This commit is contained in:
Masahisa Kojima 2019-03-07 11:23:42 +09:00
parent b67d20297f
commit cf6c30e08b
8 changed files with 8 additions and 2 deletions

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@ -12,7 +12,7 @@
#include <lib/mmio.h>
/* MHUv2 Base Address */
#define MHUV2_BASE_ADDR PLAT_CSS_MHU_BASE
#define MHUV2_BASE_ADDR PLAT_MHUV2_BASE
/* MHUv2 Control Registers Offsets */
#define MHU_V2_MSG_NO_CAP_OFFSET 0xF80

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@ -222,6 +222,7 @@
/* MHU related constants */
#define PLAT_CSS_MHU_BASE UL(0x2b1f0000)
#define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE
/*
* Base address of the first memory region used for communication between AP

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@ -61,6 +61,7 @@
#define PLAT_ARM_NSTIMER_FRAME_ID 0
#define PLAT_CSS_MHU_BASE 0x45000000
#define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE
#define PLAT_MAX_PWR_LVL 1
#define PLAT_ARM_G1S_IRQS ARM_G1S_IRQS, \

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@ -16,6 +16,7 @@
#define CSS_SGI_MAX_PE_PER_CPU 2
#define PLAT_CSS_MHU_BASE UL(0x45400000)
#define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE
/* Base address of DMC-620 instances */
#define RDE1EDGE_DMC620_BASE0 UL(0x4e000000)

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@ -16,6 +16,7 @@
#define CSS_SGI_MAX_PE_PER_CPU 1
#define PLAT_CSS_MHU_BASE UL(0x45400000)
#define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE
/* Base address of DMC-620 instances */
#define RDN1EDGE_DMC620_BASE0 UL(0x4e000000)

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@ -16,6 +16,7 @@
#define CSS_SGI_MAX_PE_PER_CPU 1
#define PLAT_CSS_MHU_BASE UL(0x45000000)
#define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE
/* Base address of DMC-620 instances */
#define SGI575_DMC620_BASE0 UL(0x4e000000)

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@ -86,6 +86,7 @@
/* MHU related constants */
#define PLAT_CSS_MHU_BASE 0x2b1f0000
#define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE
#define PLAT_ARM_TRUSTED_ROM_BASE 0x00000000
#define PLAT_ARM_TRUSTED_ROM_SIZE 0x00080000

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@ -80,7 +80,7 @@
#define DRAMINFO_BASE 0x2E00FFC0
#define PLAT_SQ_MHU_BASE 0x45000000
#define PLAT_CSS_MHU_BASE PLAT_SQ_MHU_BASE
#define PLAT_MHUV2_BASE 0xFFFFFFFF /* MHUV2 is not supported */
#define PLAT_SQ_SCP_COM_SHARED_MEM_BASE 0x45400000
#define SCPI_CMD_GET_DRAMINFO 0x1