Tegra: Rename CORTEX_A57_ACTLR_EL1 to *CPUACTLR*
CORTEX_A57_ACTLR_EL1 macro refers to the CPUACTLR_EL1 register. Since ACTLR_EL1 is a different register (not implemented in Cortex-A57) this patch renames this macro for clarity. Change-Id: I94d7d564cd2423ae032bbdd59a99d2dc535cdff6 Signed-off-by: Eleanor Bonnici <Eleanor.bonnici@arm.com>
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -316,18 +316,18 @@ func tegra_secure_entrypoint _align=6
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* entries from the branch predictor array.
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* -------------------------------------------------------
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*/
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mrs x0, CORTEX_A57_ACTLR_EL1
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mrs x0, CORTEX_A57_CPUACTLR_EL1
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orr x0, x0, #1
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msr CORTEX_A57_ACTLR_EL1, x0 /* invalidate BTB and I$ together */
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msr CORTEX_A57_CPUACTLR_EL1, x0 /* invalidate BTB and I$ together */
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dsb sy
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isb
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ic iallu /* actual invalidate */
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dsb sy
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isb
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mrs x0, CORTEX_A57_ACTLR_EL1
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mrs x0, CORTEX_A57_CPUACTLR_EL1
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bic x0, x0, #1
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msr CORTEX_A57_ACTLR_EL1, X0 /* restore original CPUACTLR_EL1 */
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msr CORTEX_A57_CPUACTLR_EL1, X0 /* restore original CPUACTLR_EL1 */
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dsb sy
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isb
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@ -351,7 +351,7 @@ func tegra_secure_entrypoint _align=6
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msr oslar_el1, x0 /* os lock stays 0 across warm reset */
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mov x3, #3
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movz x4, #0x8000, lsl #48
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msr CORTEX_A57_ACTLR_EL1, x4 /* turn off RCG */
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msr CORTEX_A57_CPUACTLR_EL1, x4 /* turn off RCG */
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isb
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msr rmr_el3, x3 /* request warm reset */
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isb
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