gxbb: Implement PSCI_CPU_OFF
This works fine for CPU1-3, but it fails for CPU0, where it is simply ignored and leaves CPU0 in a WFI loop. Change-Id: I7d73683fdd894f2021d6a5bc2cce6cd03e18e633 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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@ -101,12 +101,28 @@ static void gxbb_pwr_domain_on_finish(const psci_power_state_t *target_state)
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gicv2_cpuif_enable();
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}
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static void gxbb_pwr_domain_off(const psci_power_state_t *target_state)
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{
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u_register_t mpidr = read_mpidr_el1();
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unsigned int core = plat_gxbb_calc_core_pos(mpidr);
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uintptr_t addr = GXBB_PSCI_MAILBOX_BASE + 8 + (core << 4);
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mmio_write_32(addr, 0xFFFFFFFF);
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flush_dcache_range(addr, sizeof(uint32_t));
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gicv2_cpuif_disable();
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scpi_set_css_power_state(mpidr,
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SCPI_POWER_OFF, SCPI_POWER_ON, SCPI_POWER_ON);
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}
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/*******************************************************************************
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* Platform handlers and setup function.
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******************************************************************************/
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static const plat_psci_ops_t gxbb_ops = {
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.pwr_domain_on = gxbb_pwr_domain_on,
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.pwr_domain_on_finish = gxbb_pwr_domain_on_finish,
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.pwr_domain_off = gxbb_pwr_domain_off,
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.system_off = gxbb_system_off,
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.system_reset = gxbb_system_reset,
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};
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