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Merge "FVP: Fix BL31 load address and image size for RESET_TO_BL31=1" into integration

This commit is contained in:
Mark Dykes 2020-02-18 17:02:50 +00:00 committed by TrustedFirmware Code Review
parent 98ab180565 6227cca9e8
commit d3b1bfc10f
2 changed files with 15 additions and 9 deletions
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18
docs/plat/arm/fvp/index.rst
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@ -277,15 +277,15 @@ And the FVP binary can be run with the following command:
-C cluster0.NUM_CORES=4 \
-C cluster1.NUM_CORES=4 \
-C cache_state_modelled=1 \
-C cluster0.cpu0.RVBAR=0x04020000 \
-C cluster0.cpu1.RVBAR=0x04020000 \
-C cluster0.cpu2.RVBAR=0x04020000 \
-C cluster0.cpu3.RVBAR=0x04020000 \
-C cluster1.cpu0.RVBAR=0x04020000 \
-C cluster1.cpu1.RVBAR=0x04020000 \
-C cluster1.cpu2.RVBAR=0x04020000 \
-C cluster1.cpu3.RVBAR=0x04020000 \
--data cluster0.cpu0="<path-to>/bl31.bin"@0x04020000 \
-C cluster0.cpu0.RVBAR=0x04001000 \
-C cluster0.cpu1.RVBAR=0x04001000 \
-C cluster0.cpu2.RVBAR=0x04001000 \
-C cluster0.cpu3.RVBAR=0x04001000 \
-C cluster1.cpu0.RVBAR=0x04001000 \
-C cluster1.cpu1.RVBAR=0x04001000 \
-C cluster1.cpu2.RVBAR=0x04001000 \
-C cluster1.cpu3.RVBAR=0x04001000 \
--data cluster0.cpu0="<path-to>/bl31.bin"@0x04001000 \
--data cluster0.cpu0="<path-to>/<patched-fdt>"@0x82000000 \
--data cluster0.cpu0="<path-to>/<kernel-binary>"@0x80080000 \
--data cluster0.cpu0="<path-to>/<ramdisk.img>"@0x84000000

6
plat/arm/board/fvp/include/platform_def.h
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@ -116,12 +116,18 @@
# define PLAT_ARM_MAX_BL2_SIZE (UL(0x11000) - FVP_BL2_ROMLIB_OPTIMIZATION)
#endif
#if RESET_TO_BL31
/* Size of Trusted SRAM - the first 4KB of shared memory */
#define PLAT_ARM_MAX_BL31_SIZE (PLAT_ARM_TRUSTED_SRAM_SIZE - \
ARM_SHARED_RAM_SIZE)
#else
/*
* Since BL31 NOBITS overlays BL2 and BL1-RW, PLAT_ARM_MAX_BL31_SIZE is
* calculated using the current BL31 PROGBITS debug size plus the sizes of
* BL2 and BL1-RW
*/
#define PLAT_ARM_MAX_BL31_SIZE UL(0x3B000)
#endif /* RESET_TO_BL31 */
#ifndef __aarch64__
/*