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fix(errata): workaround for Cortex-A510 erratum 2288014 

Cortex-A510 erratum 2288014 is a Cat B erratum that applies to revisions
r0p0, r0p1, r0p2, r0p3 and r1p0, and is fixed in r1p1.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2397239

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I875519ff55be90244cc3d3a7e9f7abad0fc3c2b8
This commit is contained in:
johpow01 2022-01-06 14:54:49 -06:00 committed by John Powell
parent 83435637bf
commit d5e2512c6b
4 changed files with 54 additions and 0 deletions
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4
docs/design/cpu-specific-build-macros.rst
View File

@ -480,6 +480,10 @@ For Cortex-A510, the following errata build flags are defined :
Cortex-A510 CPU. This needs to be enabled only for revision r0p0, it is
fixed in r0p1.
- ``ERRATA_A510_2288014``: This applies errata 2288014 workaround to
Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1,
r0p2, r0p3 and r1p0, it is fixed in r1p1.
DSU Errata Workarounds
----------------------

5
include/lib/cpus/aarch64/cortex_a510.h
View File

@ -25,4 +25,9 @@
******************************************************************************/
#define CORTEX_A510_CMPXACTLR_EL1 S3_0_C15_C1_3
/*******************************************************************************
* Auxiliary control register specific definitions
******************************************************************************/
#define CORTEX_A510_CPUACTLR_EL1 S3_0_C15_C1_0
#endif /* CORTEX_A510_H */

36
lib/cpus/aarch64/cortex_a510.S
View File

@ -50,6 +50,36 @@ func check_errata_1922240
b cpu_rev_var_ls
endfunc check_errata_1922240
/* --------------------------------------------------
* Errata Workaround for Cortex-A510 Errata #2288014.
* This applies only to revisions r0p0, r0p1, r0p2,
* r0p3 and r1p0. (fixed in r1p1)
* x0: variant[4:7] and revision[0:3] of current cpu.
* Shall clobber: x0, x1, x17
* --------------------------------------------------
*/
func errata_cortex_a510_2288014_wa
/* Check workaround compatibility. */
mov x17, x30
bl check_errata_2288014
cbz x0, 1f
/* Apply the workaround by setting IMP_CPUACTLR_EL1[18] = 0b1. */
mrs x0, CORTEX_A510_CPUACTLR_EL1
mov x1, #1
bfi x0, x1, #18, #1
msr CORTEX_A510_CPUACTLR_EL1, x0
1:
ret x17
endfunc errata_cortex_a510_2288014_wa
func check_errata_2288014
/* Applies to r1p0 and below */
mov x1, #0x10
b cpu_rev_var_ls
endfunc check_errata_2288014
/* ----------------------------------------------------
* HW will do the cache maintenance while powering down
* ----------------------------------------------------
@ -81,6 +111,7 @@ func cortex_a510_errata_report
* checking functions of each errata.
*/
report_errata ERRATA_A510_1922240, cortex_a510, 1922240
report_errata ERRATA_A510_2288014, cortex_a510, 2288014
ldp x8, x30, [sp], #16
ret
@ -103,6 +134,11 @@ func cortex_a510_reset_func
bl errata_cortex_a510_1922240_wa
#endif
#if ERRATA_A510_2288014
mov x0, x18
bl errata_cortex_a510_2288014_wa
#endif
ret x19
endfunc cortex_a510_reset_func

9
lib/cpus/cpu-ops.mk
View File

@ -534,6 +534,11 @@ ERRATA_X2_2216384 ?=0
# to revision r0p0 of the Cortex-A510 cpu and is fixed in r0p1.
ERRATA_A510_1922240 ?=0
# Flag to apply erratum 2288014 workaround during reset. This erratum applies
# to revisions r0p0, r0p1, r0p2, r0p3 and r1p0 of the Cortex-A510 cpu and is
# fixed in r1p1.
ERRATA_A510_2288014 ?=0
# Flag to apply DSU erratum 798953. This erratum applies to DSUs revision r0p0.
# Applying the workaround results in higher DSU power consumption on idle.
ERRATA_DSU_798953 ?=0
@ -995,6 +1000,10 @@ $(eval $(call add_define,ERRATA_X2_2216384))
$(eval $(call assert_boolean,ERRATA_A510_1922240))
$(eval $(call add_define,ERRATA_A510_1922240))
# Process ERRATA_A510_2288014 flag
$(eval $(call assert_boolean,ERRATA_A510_2288014))
$(eval $(call add_define,ERRATA_A510_2288014))
# Process ERRATA_DSU_798953 flag
$(eval $(call assert_boolean,ERRATA_DSU_798953))
$(eval $(call add_define,ERRATA_DSU_798953))