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fix(stm32mp1): deconfigure UART RX pins 

Those pins are configured by ROM code, for serial boot use cases.
Their configs are reset if the boot is done on UART, but not on USB.
This should then be done in TF-A. This has to be done after clock
init, and before console is configured.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I29a9694e25fcf1665360dd71f73937f769c43b52
This commit is contained in:
Yann Gautier 2021-06-04 14:04:05 +02:00 committed by Yann Gautier
parent 737ad29bf9
commit d7176f0319
3 changed files with 57 additions and 3 deletions
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5
plat/st/stm32mp1/bl2_plat_setup.c
View File

@ -248,6 +248,11 @@ void bl2_el3_plat_arch_setup(void)
stm32mp1_syscfg_init();
#if STM32MP_USB_PROGRAMMER
/* Deconfigure all UART RX pins configured by ROM code */
stm32mp1_deconfigure_uart_pins();
#endif
result = dt_get_stdout_uart_info(&dt_uart_info);
if ((result <= 0) ||

2
plat/st/stm32mp1/include/stm32mp1_private.h
View File

@ -21,6 +21,8 @@ void stm32mp1_syscfg_init(void);
void stm32mp1_syscfg_enable_io_compensation(void);
void stm32mp1_syscfg_disable_io_compensation(void);
void stm32mp1_deconfigure_uart_pins(void);
#if STM32MP_USE_STM32IMAGE
uint32_t stm32mp_get_ddr_ns_size(void);
#endif /* STM32MP_USE_STM32IMAGE */

53
plat/st/stm32mp1/stm32mp1_private.c
View File

@ -6,13 +6,13 @@
#include <assert.h>
#include <drivers/st/stm32_gpio.h>
#include <drivers/st/stm32_iwdg.h>
#include <libfdt.h>
#include <lib/xlat_tables/xlat_tables_v2.h>
#include <platform_def.h>
#include <drivers/st/stm32_iwdg.h>
#include <lib/xlat_tables/xlat_tables_v2.h>
/* Internal layout of the 32bit OTP word board_id */
#define BOARD_ID_BOARD_NB_MASK GENMASK(31, 16)
#define BOARD_ID_BOARD_NB_SHIFT 16
@ -188,6 +188,53 @@ uintptr_t get_uart_address(uint32_t instance_nb)
}
#endif
#if STM32MP_USB_PROGRAMMER
struct gpio_bank_pin_list {
uint32_t bank;
uint32_t pin;
};
static const struct gpio_bank_pin_list gpio_list[] = {
{ /* USART2_RX: GPIOA3 */
.bank = 0U,
.pin = 3U,
},
{ /* USART3_RX: GPIOB12 */
.bank = 1U,
.pin = 12U,
},
{ /* UART4_RX: GPIOB2 */
.bank = 1U,
.pin = 2U,
},
{ /* UART5_RX: GPIOB4 */
.bank = 1U,
.pin = 5U,
},
{ /* USART6_RX: GPIOC7 */
.bank = 2U,
.pin = 7U,
},
{ /* UART7_RX: GPIOF6 */
.bank = 5U,
.pin = 6U,
},
{ /* UART8_RX: GPIOE0 */
.bank = 4U,
.pin = 0U,
},
};
void stm32mp1_deconfigure_uart_pins(void)
{
size_t i;
for (i = 0U; i < ARRAY_SIZE(gpio_list); i++) {
set_gpio_reset_cfg(gpio_list[i].bank, gpio_list[i].pin);
}
}
#endif
uint32_t stm32mp_get_chip_version(void)
{
uint32_t version = 0U;