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Prevent colliding identifiers 

There was a collision between the name of the typedef in the CASSERT and
something else, so we make the name of the typedef unique to the
invocation of DEFFINE_SVC_UUID2 by appending the name that's passed into
the macro. This eliminates the following MISRA violation:

    bl1/bl1_main.c:233:[MISRA C-2012 Rule 5.6 (required)] Identifier
    "invalid_svc_uuid" is already used to represent a typedef.

This also resolves MISRA rule 5.9.

These renamings are as follows:
  * tzram -> secram. This matches the function call name as it has
  sec_mem in it's  name
  * fw_config_base -> config_base. This file does not mess with
  hw_conig, so there's little chance of confusion

Change-Id: I8734ba0956140c8e29b89d0596d10d61a6ef351e
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
This commit is contained in:
Jimmy Brisson 2020-08-05 14:05:53 -05:00 committed by Sandrine Bailleux
parent a6cccccd34
commit d74c6b8336
3 changed files with 12 additions and 11 deletions
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3
include/lib/smccc.h
View File

@ -122,7 +122,8 @@
*/
#define DEFINE_SVC_UUID2(_name, _tl, _tm, _th, _cl, _ch, \
_n0, _n1, _n2, _n3, _n4, _n5) \
CASSERT((uint32_t)(_tl) != (uint32_t)SMC_UNK, invalid_svc_uuid);\
CASSERT((uint32_t)(_tl) != (uint32_t)SMC_UNK, \
invalid_svc_uuid_##_name); \
static const uuid_t _name = { \
{((_tl) >> 24) & 0xFF, \
((_tl) >> 16) & 0xFF, \

6
plat/arm/common/arm_bl2_setup.c
View File

@ -27,7 +27,7 @@
static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
/* Base address of fw_config received from BL1 */
static uintptr_t fw_config_base;
static uintptr_t config_base;
/*
* Check that BL2_BASE is above ARM_FW_CONFIG_LIMIT. This reserved page is
@ -66,7 +66,7 @@ void arm_bl2_early_platform_setup(uintptr_t fw_config,
/* Setup the BL2 memory layout */
bl2_tzram_layout = *mem_layout;
fw_config_base = fw_config;
config_base = fw_config;
/* Initialise the IO layer and register platform IO devices */
plat_arm_io_setup();
@ -152,7 +152,7 @@ void bl2_plat_arch_setup(void)
arm_bl2_plat_arch_setup();
/* Fill the properties struct with the info from the config dtb */
fconf_populate("FW_CONFIG", fw_config_base);
fconf_populate("FW_CONFIG", config_base);
/* TB_FW_CONFIG was also loaded by BL1 */
tb_fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, TB_FW_CONFIG_ID);

14
plat/common/plat_bl1_common.c
View File

@ -83,8 +83,8 @@ int bl1_plat_mem_check(uintptr_t mem_base, unsigned int mem_size,
*/
int bl1_plat_handle_post_image_load(unsigned int image_id)
{
meminfo_t *bl2_tzram_layout;
meminfo_t *bl1_tzram_layout;
meminfo_t *bl2_secram_layout;
meminfo_t *bl1_secram_layout;
image_desc_t *image_desc;
entry_point_info_t *ep_info;
@ -99,7 +99,7 @@ int bl1_plat_handle_post_image_load(unsigned int image_id)
ep_info = &image_desc->ep_info;
/* Find out how much free trusted ram remains after BL1 load */
bl1_tzram_layout = bl1_plat_sec_mem_layout();
bl1_secram_layout = bl1_plat_sec_mem_layout();
/*
* Create a new layout of memory for BL2 as seen by BL1 i.e.
@ -108,14 +108,14 @@ int bl1_plat_handle_post_image_load(unsigned int image_id)
* to BL2. BL2 will read the memory layout before using its
* memory for other purposes.
*/
bl2_tzram_layout = (meminfo_t *) bl1_tzram_layout->total_base;
bl2_secram_layout = (meminfo_t *) bl1_secram_layout->total_base;
bl1_calc_bl2_mem_layout(bl1_tzram_layout, bl2_tzram_layout);
bl1_calc_bl2_mem_layout(bl1_secram_layout, bl2_secram_layout);
ep_info->args.arg1 = (uintptr_t)bl2_tzram_layout;
ep_info->args.arg1 = (uintptr_t)bl2_secram_layout;
VERBOSE("BL1: BL2 memory layout address = %p\n",
(void *) bl2_tzram_layout);
(void *) bl2_secram_layout);
return 0;
}