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Workaround for Cortex A76 erratum 1791580 

Cortex A76 erratum 1791580 is a Cat B erratum present in earlier
revisions of the Cortex A76. The workaround is to set a bit in the
implementation defined CPUACTLR2 register, which forces atomic store
operations to write-back memory to be performed in the L1 data cache.

This errata is explained in this SDEN:
https://static.docs.arm.com/sden885749/g/Arm_Cortex_A76_MP052_Software_Developer_Errata_Notice_v20.pdf

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Iefd58159b3f2e2286138993317b98e57dc361925
This commit is contained in:
johpow01 2020-05-29 14:17:38 -05:00
parent 9935047b20
commit d7b08e6904
4 changed files with 47 additions and 1 deletions
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3
docs/design/cpu-specific-build-macros.rst
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@ -227,6 +227,9 @@ For Cortex-A76, the following errata build flags are defined :
- ``ERRATA_A76_1275112``: This applies errata 1275112 workaround to Cortex-A76
CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
- ``ERRATA_A76_1791580``: This applies errata 1791580 workaround to Cortex-A76
CPU. This needs to be enabled only for revision <= r4p0 of the CPU.
For Cortex-A78, the following errata build flags are defined :
- ``ERRATA_A78_1688305``: This applies errata 1688305 workaround to Cortex-A78

4
include/lib/cpus/aarch64/cortex_a76.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -32,6 +32,8 @@
#define CORTEX_A76_CPUACTLR2_EL1 S3_0_C15_C1_1
#define CORTEX_A76_CPUACTLR2_EL1_BIT_2 (ULL(1) << 2)
#define CORTEX_A76_CPUACTLR2_EL1_DISABLE_LOAD_PASS_STORE (ULL(1) << 16)
#define CORTEX_A76_CPUACTLR3_EL1 S3_0_C15_C1_2

33
lib/cpus/aarch64/cortex_a76.S
View File

@ -392,6 +392,33 @@ func check_errata_1286807
#endif
endfunc check_errata_1286807
/* --------------------------------------------------
* Errata workaround for Cortex A76 Errata #1791580.
* This applies to revisions <= r4p0 of Cortex A76.
* Inputs:
* x0: variant[4:7] and revision[0:3] of current cpu.
* Shall clobber: x0-x17
* --------------------------------------------------
*/
func errata_a76_1791580_wa
/* Compare x0 against revision r4p0 */
mov x17, x30
bl check_errata_1791580
cbz x0, 1f
mrs x1, CORTEX_A76_CPUACTLR2_EL1
orr x1, x1, CORTEX_A76_CPUACTLR2_EL1_BIT_2
msr CORTEX_A76_CPUACTLR2_EL1, x1
isb
1:
ret x17
endfunc errata_a76_1791580_wa
func check_errata_1791580
/* Applies to everything <=r4p0. */
mov x1, #0x40
b cpu_rev_var_ls
endfunc check_errata_1791580
func check_errata_cve_2018_3639
#if WORKAROUND_CVE_2018_3639
mov x0, #ERRATA_APPLIES
@ -449,6 +476,11 @@ func cortex_a76_reset_func
bl errata_a76_1262888_wa
#endif
#if ERRATA_A76_1791580
mov x0, x18
bl errata_a76_1791580_wa
#endif
#if WORKAROUND_CVE_2018_3639
/* If the PE implements SSBS, we don't need the dynamic workaround */
mrs x0, id_aa64pfr1_el1
@ -529,6 +561,7 @@ func cortex_a76_errata_report
report_errata ERRATA_A76_1262888, cortex_a76, 1262888
report_errata ERRATA_A76_1275112, cortex_a76, 1275112
report_errata ERRATA_A76_1286807, cortex_a76, 1286807
report_errata ERRATA_A76_1791580, cortex_a76, 1791580
report_errata WORKAROUND_CVE_2018_3639, cortex_a76, cve_2018_3639
report_errata ERRATA_DSU_798953, cortex_a76, dsu_798953
report_errata ERRATA_DSU_936184, cortex_a76, dsu_936184

8
lib/cpus/cpu-ops.mk
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@ -250,6 +250,10 @@ ERRATA_A76_1275112 ?=0
# only to revision <= r3p0 of the Cortex A76 cpu.
ERRATA_A76_1286807 ?=0
# Flag to apply erratum 1791580 workaround during reset. This erratum applies
# only to revision <= r4p0 of the Cortex A76 cpu.
ERRATA_A76_1791580 ?=0
# Flag to apply erratum 1688305 workaround during reset. This erratum applies
# to revisions r0p0 - r1p0 of the A78 cpu.
ERRATA_A78_1688305 ?=0
@ -487,6 +491,10 @@ $(eval $(call add_define,ERRATA_A76_1275112))
$(eval $(call assert_boolean,ERRATA_A76_1286807))
$(eval $(call add_define,ERRATA_A76_1286807))
# Process ERRATA_A76_1791580 flag
$(eval $(call assert_boolean,ERRATA_A76_1791580))
$(eval $(call add_define,ERRATA_A76_1791580))
# Process ERRATA_A78_1688305 flag
$(eval $(call assert_boolean,ERRATA_A78_1688305))
$(eval $(call add_define,ERRATA_A78_1688305))