SPM: SGI: Map memory allocated for secure partitions
The secure partition manager reserves chunks of memory which are used for the S-EL0 StandaloneMM image and the buffers required for communication between the Non-Secure world with the StandaloneMM image. Add the memory chunks to relevant arrays for mapping the regions of memory with corresponding attributes. Change-Id: If371d1afee0a50ca7cacd55e16aeaca949d5062b Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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@ -86,6 +86,12 @@
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#define PLAT_ARM_GICC_BASE 0x2C000000
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#define PLAT_ARM_GICR_BASE 0x300C0000
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/* Map the secure region for access from S-EL0 */
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#define PLAT_ARM_SECURE_MAP_DEVICE MAP_REGION_FLAT( \
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SOC_CSS_DEVICE_BASE, \
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SOC_CSS_DEVICE_SIZE, \
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MT_DEVICE | MT_RW | MT_SECURE | MT_USER)
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#if RAS_EXTENSION
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/* Allocate 128KB for CPER buffers */
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#define PLAT_SP_BUF_BASE ULL(0x20000)
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@ -5,11 +5,13 @@
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*/
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#include <arm_def.h>
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#include <arm_spm_def.h>
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#include <bl_common.h>
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#include <ccn.h>
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#include <debug.h>
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#include <plat_arm.h>
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#include <platform.h>
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#include <secure_partition.h>
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#include "../../../../bl1/bl1_private.h"
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#if USE_COHERENT_MEM
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@ -57,6 +59,9 @@ const mmap_region_t plat_arm_mmap[] = {
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ARM_MAP_NS_DRAM1,
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#if ARM_BL31_IN_DRAM
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ARM_MAP_BL31_SEC_DRAM,
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#endif
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#if ENABLE_SPM
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ARM_SP_IMAGE_MMAP,
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#endif
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{0}
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};
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@ -67,8 +72,72 @@ const mmap_region_t plat_arm_mmap[] = {
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V2M_MAP_IOFPGA,
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CSS_SGI_MAP_DEVICE,
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SOC_CSS_MAP_DEVICE,
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#if ENABLE_SPM
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ARM_SPM_BUF_EL3_MMAP,
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#endif
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{0}
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};
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#if ENABLE_SPM && defined(IMAGE_BL31)
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const mmap_region_t plat_arm_secure_partition_mmap[] = {
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PLAT_ARM_SECURE_MAP_DEVICE,
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ARM_SP_IMAGE_MMAP,
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ARM_SP_IMAGE_NS_BUF_MMAP,
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ARM_SP_IMAGE_RW_MMAP,
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ARM_SPM_BUF_EL0_MMAP,
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{0}
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};
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#endif /* ENABLE_SPM && defined(IMAGE_BL31) */
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#endif
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ARM_CASSERT_MMAP
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#if ENABLE_SPM && defined(IMAGE_BL31)
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/*
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* Boot information passed to a secure partition during initialisation. Linear
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* indices in MP information will be filled at runtime.
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*/
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static secure_partition_mp_info_t sp_mp_info[] = {
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[0] = {0x81000000, 0},
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[1] = {0x81000100, 0},
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[2] = {0x81000200, 0},
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[3] = {0x81000300, 0},
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[4] = {0x81010000, 0},
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[5] = {0x81010100, 0},
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[6] = {0x81010200, 0},
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[7] = {0x81010300, 0},
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};
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const secure_partition_boot_info_t plat_arm_secure_partition_boot_info = {
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.h.type = PARAM_SP_IMAGE_BOOT_INFO,
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.h.version = VERSION_1,
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.h.size = sizeof(secure_partition_boot_info_t),
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.h.attr = 0,
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.sp_mem_base = ARM_SP_IMAGE_BASE,
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.sp_mem_limit = ARM_SP_IMAGE_LIMIT,
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.sp_image_base = ARM_SP_IMAGE_BASE,
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.sp_stack_base = PLAT_SP_IMAGE_STACK_BASE,
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.sp_heap_base = ARM_SP_IMAGE_HEAP_BASE,
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.sp_ns_comm_buf_base = ARM_SP_IMAGE_NS_BUF_BASE,
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.sp_shared_buf_base = PLAT_SPM_BUF_BASE,
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.sp_image_size = ARM_SP_IMAGE_SIZE,
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.sp_pcpu_stack_size = PLAT_SP_IMAGE_STACK_PCPU_SIZE,
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.sp_heap_size = ARM_SP_IMAGE_HEAP_SIZE,
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.sp_ns_comm_buf_size = ARM_SP_IMAGE_NS_BUF_SIZE,
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.sp_shared_buf_size = PLAT_SPM_BUF_SIZE,
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.num_sp_mem_regions = ARM_SP_IMAGE_NUM_MEM_REGIONS,
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.num_cpus = PLATFORM_CORE_COUNT,
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.mp_info = &sp_mp_info[0],
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};
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const struct mmap_region *plat_get_secure_partition_mmap(void *cookie)
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{
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return plat_arm_secure_partition_mmap;
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}
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const struct secure_partition_boot_info *plat_get_secure_partition_boot_info(
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void *cookie)
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{
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return &plat_arm_secure_partition_boot_info;
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}
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#endif /* ENABLE_SPM && defined(IMAGE_BL31) */
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