intel: mailbox: Ensure time out duration is predictive
For each count down of time out counter, wait for number of miliseconds to ensure the time out duration is predictive. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Change-Id: I0e92dd1ef1da0ef504ec86472cf0d3c88528930b
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@ -101,6 +101,8 @@ static const gicv2_driver_data_t plat_gicv2_gic_data = {
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******************************************************************************/
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void bl31_platform_setup(void)
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{
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socfpga_delay_timer_init();
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/* Initialize the gic cpu and distributor interfaces */
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gicv2_driver_init(&plat_gicv2_gic_data);
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gicv2_distif_init();
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@ -25,7 +25,8 @@ PLAT_BL_COMMON_SOURCES := \
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lib/xlat_tables/aarch64/xlat_tables.c \
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lib/xlat_tables/xlat_tables_common.c \
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plat/intel/soc/common/aarch64/platform_common.c \
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plat/intel/soc/common/aarch64/plat_helpers.S
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plat/intel/soc/common/aarch64/plat_helpers.S \
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plat/intel/soc/common/socfpga_delay_timer.c
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BL2_SOURCES += \
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common/desc_image_load.c \
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@ -44,7 +45,6 @@ BL2_SOURCES += \
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plat/intel/soc/agilex/soc/agilex_mmc.c \
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plat/intel/soc/agilex/soc/agilex_pinmux.c \
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plat/intel/soc/common/bl2_plat_mem_params_desc.c \
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plat/intel/soc/common/socfpga_delay_timer.c \
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plat/intel/soc/common/socfpga_image_load.c \
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plat/intel/soc/common/socfpga_storage.c \
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plat/intel/soc/common/soc/socfpga_emac.c \
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@ -89,7 +89,7 @@ int mailbox_read_response(uint32_t *job_id, uint32_t *response, int resp_len)
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int mailbox_poll_response(uint32_t job_id, int urgent, uint32_t *response,
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int resp_len)
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{
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int timeout = 0xFFFFFF;
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uint32_t timeout = 40U;
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int rin = 0;
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int rout = 0;
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int resp_data = 0;
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@ -97,13 +97,15 @@ int mailbox_poll_response(uint32_t job_id, int urgent, uint32_t *response,
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while (1) {
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while (timeout > 0 &&
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!(mmio_read_32(MBOX_OFFSET +
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MBOX_DOORBELL_FROM_SDM) & 1)) {
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timeout--;
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}
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do {
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if (mmio_read_32(MBOX_OFFSET + MBOX_DOORBELL_FROM_SDM)
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& 1) {
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break;
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}
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mdelay(25);
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} while (--timeout != 0U);
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if (!timeout) {
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if (timeout == 0U) {
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INFO("Timed out waiting for SDM\n");
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return MBOX_TIMEOUT;
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}
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@ -164,7 +166,7 @@ int iterate_resp(int mbox_resp_len, uint32_t *resp_buf, int resp_len)
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int rout = mmio_read_32(MBOX_OFFSET + MBOX_ROUT);
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while (mbox_resp_len > 0) {
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timeout = 0xFFFFFF;
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timeout = 40;
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mbox_resp_len--;
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resp_data = mmio_read_32(MBOX_OFFSET +
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MBOX_RESP_BUFFER +
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@ -180,11 +182,16 @@ int iterate_resp(int mbox_resp_len, uint32_t *resp_buf, int resp_len)
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mmio_write_32(MBOX_OFFSET + MBOX_ROUT, rout);
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do {
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timeout--;
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rin = mmio_read_32(MBOX_OFFSET + MBOX_RIN);
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} while ((rout == rin) && (mbox_resp_len > 0) && (timeout > 0));
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if (rout == rin) {
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mdelay(25);
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} else {
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break;
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}
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timeout--;
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} while ((mbox_resp_len > 0) && (timeout != 0U));
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if (timeout == 0) {
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if (timeout == 0U) {
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INFO("Timed out waiting for SDM\n");
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return MBOX_TIMEOUT;
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}
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@ -109,6 +109,8 @@ static const gicv2_driver_data_t plat_gicv2_gic_data = {
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******************************************************************************/
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void bl31_platform_setup(void)
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{
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socfpga_delay_timer_init();
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/* Initialize the gic cpu and distributor interfaces */
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gicv2_driver_init(&plat_gicv2_gic_data);
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gicv2_distif_init();
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@ -25,7 +25,8 @@ PLAT_BL_COMMON_SOURCES := \
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lib/xlat_tables/aarch64/xlat_tables.c \
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lib/xlat_tables/xlat_tables_common.c \
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plat/intel/soc/common/aarch64/platform_common.c \
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plat/intel/soc/common/aarch64/plat_helpers.S
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plat/intel/soc/common/aarch64/plat_helpers.S \
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plat/intel/soc/common/socfpga_delay_timer.c
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BL2_SOURCES += \
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common/desc_image_load.c \
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@ -43,7 +44,6 @@ BL2_SOURCES += \
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plat/intel/soc/stratix10/soc/s10_memory_controller.c \
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plat/intel/soc/stratix10/soc/s10_pinmux.c \
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plat/intel/soc/common/bl2_plat_mem_params_desc.c \
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plat/intel/soc/common/socfpga_delay_timer.c \
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plat/intel/soc/common/socfpga_image_load.c \
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plat/intel/soc/common/socfpga_storage.c \
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plat/intel/soc/common/soc/socfpga_emac.c \
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