imx: add i.MX8 SoCs OTP SIP(silicon provider) service support
For NXP's i.MX8 SoCs with system controller inside, OTP is maintained by SCFW, Linux needs to call SMC to trap to TF-A for OTP read/write etc. operations by calling SCFW API. This patch adds OTP SIP service support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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@ -102,3 +102,29 @@ int imx_wakeup_src_handler(uint32_t smc_fid,
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return SMC_OK;
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}
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int imx_otp_handler(uint32_t smc_fid,
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void *handle,
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u_register_t x1,
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u_register_t x2)
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{
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int ret;
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uint32_t fuse;
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switch (smc_fid) {
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case IMX_SIP_OTP_READ:
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ret = sc_misc_otp_fuse_read(ipc_handle, x1, &fuse);
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SMC_RET2(handle, ret, fuse);
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break;
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case IMX_SIP_OTP_WRITE:
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ret = sc_misc_otp_fuse_write(ipc_handle, x1, x2);
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SMC_RET1(handle, ret);
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break;
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default:
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ret = SMC_UNK;
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SMC_RET1(handle, ret);
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break;
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}
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return ret;
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}
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@ -34,6 +34,9 @@ static uintptr_t imx_sip_handler(unsigned int smc_fid,
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break;
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case IMX_SIP_WAKEUP_SRC:
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SMC_RET1(handle, imx_wakeup_src_handler(smc_fid, x1, x2, x3));
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case IMX_SIP_OTP_READ:
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case IMX_SIP_OTP_WRITE:
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return imx_otp_handler(smc_fid, handle, x1, x2);
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#endif
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default:
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WARN("Unimplemented i.MX SiP Service Call: 0x%x\n", smc_fid);
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@ -18,6 +18,9 @@
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#define IMX_SIP_WAKEUP_SRC_SCU 0x1
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#define IMX_SIP_WAKEUP_SRC_IRQSTEER 0x2
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#define IMX_SIP_OTP_READ 0xC200000A
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#define IMX_SIP_OTP_WRITE 0xC200000B
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#if (defined(PLAT_IMX8QM) || defined(PLAT_IMX8QX))
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int imx_cpufreq_handler(uint32_t smc_fid, u_register_t x1,
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u_register_t x2, u_register_t x3);
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@ -25,6 +28,8 @@ int imx_srtc_handler(uint32_t smc_fid, void *handle, u_register_t x1,
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u_register_t x2, u_register_t x3, u_register_t x4);
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int imx_wakeup_src_handler(uint32_t smc_fid, u_register_t x1,
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u_register_t x2, u_register_t x3);
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int imx_otp_handler(uint32_t smc_fid, void *handle,
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u_register_t x1, u_register_t x2);
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#endif
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#endif /* __IMX_SIP_SVC_H__ */
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