Tegra194: Fix TEGRA186_SMMU_CTX_SIZE
TEGRA186_SMMU_CTX_SIZE should match the numbe of elements in smmu_ctx_regs, which is defined in smmu_plat_config.h. The current number of elements are 0x490. Change-Id: If0614ea8ef8b6a8f5da1a3279abaf9255eb76420 Signed-off-by: Stefan Kristiansson <stefank@nvidia.com>
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@ -10,7 +10,7 @@
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#include <memctrl_v2.h>
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#include <memctrl_v2.h>
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#include <tegra_def.h>
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#include <tegra_def.h>
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#define TEGRA186_SMMU_CTX_SIZE 0x420
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#define TEGRA186_SMMU_CTX_SIZE 0x490
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.align 4
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.align 4
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.globl tegra186_cpu_reset_handler
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.globl tegra186_cpu_reset_handler
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@ -56,12 +56,12 @@ boot_cpu:
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endfunc tegra186_cpu_reset_handler
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endfunc tegra186_cpu_reset_handler
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/*
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/*
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* Tegra186 reset data (offset 0x0 - 0x430)
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* Tegra186 reset data (offset 0x0 - 0x2490)
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*
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*
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* 0x000: secure world's entrypoint
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* 0x0000: secure world's entrypoint
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* 0x008: BL31 size (RO + RW)
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* 0x0008: BL31 size (RO + RW)
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* 0x00C: SMMU context start
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* 0x0010: SMMU context start
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* 0x42C: SMMU context end
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* 0x2490: SMMU context end
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*/
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*/
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.align 4
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.align 4
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