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plat/arm : update BL size macros to give BL1 and BL2 more space for TBB 

For Trusted Board Boot, BL1 RW section and BL2 need more space to
support the ECDSA algorithm. Specifically, PLAT_ARM_MAX_BL1_RW_SIZE
is increased on ARM platforms.

And on the Juno platform:
    - BL2 size, PLAT_ARM_MAX_BL2_SIZE is increased.
    - SCP_BL2 is loaded into the space defined by BL31_BASE ->
      BL31_RW_BASE. In order to maintain the same size space for
      SCP_BL2,PLAT_ARM_MAX_BL31_SIZE is increased.

Change-Id: I379083f918b40ab1c765da4e71780d89f0058040
Co-Authored-By: David Cunado <david.cunado@arm.com>
Signed-off-by: Qixiang Xu <qixiang.xu@arm.com>
This commit is contained in:
Qixiang Xu 2017-08-24 14:28:08 +08:00
parent df312c5a2b
commit ddfd38e830
2 changed files with 8 additions and 4 deletions
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2
include/plat/arm/board/common/board_arm_def.h
View File

@ -64,7 +64,7 @@
* PLAT_ARM_MAX_BL1_RW_SIZE is calculated using the current BL1 RW debug size
* plus a little space for growth.
*/
#define PLAT_ARM_MAX_BL1_RW_SIZE 0xA000
#define PLAT_ARM_MAX_BL1_RW_SIZE 0xB000
/*
* PLAT_ARM_MAX_BL2_SIZE is calculated using the current BL2 debug size plus a

10
plat/arm/board/juno/include/platform_def.h
View File

@ -96,7 +96,7 @@
* plus a little space for growth.
*/
#if TRUSTED_BOARD_BOOT
# define PLAT_ARM_MAX_BL1_RW_SIZE 0x9000
# define PLAT_ARM_MAX_BL1_RW_SIZE 0xA000
#else
# define PLAT_ARM_MAX_BL1_RW_SIZE 0x6000
#endif
@ -106,7 +106,7 @@
* little space for growth.
*/
#if TRUSTED_BOARD_BOOT
# define PLAT_ARM_MAX_BL2_SIZE 0x18000
# define PLAT_ARM_MAX_BL2_SIZE 0x19000
#else
# define PLAT_ARM_MAX_BL2_SIZE 0xC000
#endif
@ -114,8 +114,12 @@
/*
* PLAT_ARM_MAX_BL31_SIZE is calculated using the current BL31 debug size plus a
* little space for growth.
* SCP_BL2 image is loaded into the space BL31 -> BL1_RW_BASE.
* For TBB use case, PLAT_ARM_MAX_BL1_RW_SIZE has been increased and therefore
* PLAT_ARM_MAX_BL31_SIZE has been increased to ensure SCP_BL2 has the same
* space available.
*/
#define PLAT_ARM_MAX_BL31_SIZE 0x1D000
#define PLAT_ARM_MAX_BL31_SIZE 0x1E000
/*
* Since free SRAM space is scant, enable the ASSERTION message size