Merge "lib/cpu: Workaround for Cortex A77 erratum 1946167" into integration

This commit is contained in:
Madhukar Pappireddy 2021-04-07 23:12:00 +02:00 committed by TrustedFirmware Code Review
commit de2dd4e70a
3 changed files with 71 additions and 2 deletions

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@ -260,6 +260,9 @@ For Cortex-A77, the following errata build flags are defined :
- ``ERRATA_A77_1925769``: This applies errata 1925769 workaround to Cortex-A77
CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
- ``ERRATA_A77_1946167``: This applies errata 1946167 workaround to Cortex-A77
CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
For Cortex-A78, the following errata build flags are defined :
- ``ERRATA_A78_1688305``: This applies errata 1688305 workaround to Cortex-A78
@ -385,7 +388,7 @@ architecture that can be enabled by the platform as desired.
--------------
*Copyright (c) 2014-2020, Arm Limited and Contributors. All rights reserved.*
*Copyright (c) 2014-2021, Arm Limited and Contributors. All rights reserved.*
.. _CVE-2017-5715: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2017-5715
.. _CVE-2018-3639: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2018-3639

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2018-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -114,6 +114,58 @@ func check_errata_1925769
b cpu_rev_var_ls
endfunc check_errata_1925769
/* --------------------------------------------------
* Errata Workaround for Cortex A77 Errata #1946167.
* This applies to revision <= r1p1 of Cortex A77.
* Inputs:
* x0: variant[4:7] and revision[0:3] of current cpu.
* Shall clobber: x0-x17
* --------------------------------------------------
*/
func errata_a77_1946167_wa
/* Compare x0 against revision <= r1p1 */
mov x17, x30
bl check_errata_1946167
cbz x0, 1f
ldr x0,=0x4
msr CORTEX_A77_CPUPSELR_EL3,x0
ldr x0,=0x10E3900002
msr CORTEX_A77_CPUPOR_EL3,x0
ldr x0,=0x10FFF00083
msr CORTEX_A77_CPUPMR_EL3,x0
ldr x0,=0x2001003FF
msr CORTEX_A77_CPUPCR_EL3,x0
ldr x0,=0x5
msr CORTEX_A77_CPUPSELR_EL3,x0
ldr x0,=0x10E3800082
msr CORTEX_A77_CPUPOR_EL3,x0
ldr x0,=0x10FFF00083
msr CORTEX_A77_CPUPMR_EL3,x0
ldr x0,=0x2001003FF
msr CORTEX_A77_CPUPCR_EL3,x0
ldr x0,=0x6
msr CORTEX_A77_CPUPSELR_EL3,x0
ldr x0,=0x10E3800200
msr CORTEX_A77_CPUPOR_EL3,x0
ldr x0,=0x10FFF003E0
msr CORTEX_A77_CPUPMR_EL3,x0
ldr x0,=0x2001003FF
msr CORTEX_A77_CPUPCR_EL3,x0
isb
1:
ret x17
endfunc errata_a77_1946167_wa
func check_errata_1946167
/* Applies to everything <= r1p1 */
mov x1, #0x11
b cpu_rev_var_ls
endfunc check_errata_1946167
/* -------------------------------------------------
* The CPU Ops reset function for Cortex-A77.
* Shall clobber: x0-x19
@ -134,6 +186,11 @@ func cortex_a77_reset_func
bl errata_a77_1925769_wa
#endif
#if ERRATA_A77_1946167
mov x0, x18
bl errata_a77_1946167_wa
#endif
ret x19
endfunc cortex_a77_reset_func
@ -169,6 +226,7 @@ func cortex_a77_errata_report
*/
report_errata ERRATA_A77_1508412, cortex_a77, 1508412
report_errata ERRATA_A77_1925769, cortex_a77, 1925769
report_errata ERRATA_A77_1946167, cortex_a77, 1946167
ldp x8, x30, [sp], #16
ret

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@ -290,6 +290,10 @@ ERRATA_A77_1508412 ?=0
# only to revision <= r1p1 of the Cortex A77 cpu.
ERRATA_A77_1925769 ?=0
# Flag to apply erratum 1946167 workaround during reset. This erratum applies
# only to revision <= r1p1 of the Cortex A77 cpu.
ERRATA_A77_1946167 ?=0
# Flag to apply erratum 1688305 workaround during reset. This erratum applies
# to revisions r0p0 - r1p0 of the A78 cpu.
ERRATA_A78_1688305 ?=0
@ -585,6 +589,10 @@ $(eval $(call add_define,ERRATA_A77_1508412))
$(eval $(call assert_boolean,ERRATA_A77_1925769))
$(eval $(call add_define,ERRATA_A77_1925769))
# Process ERRATA_A77_1946167 flag
$(eval $(call assert_boolean,ERRATA_A77_1946167))
$(eval $(call add_define,ERRATA_A77_1946167))
# Process ERRATA_A78_1688305 flag
$(eval $(call assert_boolean,ERRATA_A78_1688305))
$(eval $(call add_define,ERRATA_A78_1688305))