andrius
/
arm-trusted-firmware
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Fixes in CPU specific operations framework doc 

This patch fixes a couple of issues in the "CPU specific operations
framework" section in the Firmware Design document.

 * Fix broken link to the CPU Specific Build Macros document.

 * Fix the path to the cortex_a53.S file.

 * Fix power levels terminology.

Change-Id: Ib610791eaba13dab2823b7699bb63534bcd1c8fb
This commit is contained in:
Sandrine Bailleux 2016-01-08 10:05:59 +00:00
parent 5773b5322d
commit de849c8c4f
1 changed files with 9 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
docs/firmware-design.md
View File

@ -988,11 +988,11 @@ needs to be exported for each type of CPU in the platform. It is defined in
`reset_func()`, `core_pwr_dwn()`, `cluster_pwr_dwn()` and `cpu_reg_dump()`. `reset_func()`, `core_pwr_dwn()`, `cluster_pwr_dwn()` and `cpu_reg_dump()`.
The CPU specific files in `lib/cpus` export a `cpu_ops` data structure with The CPU specific files in `lib/cpus` export a `cpu_ops` data structure with
suitable handlers for that CPU. For example, `lib/cpus/cortex_a53.S` exports suitable handlers for that CPU. For example, `lib/cpus/aarch64/cortex_a53.S`
the `cpu_ops` for Cortex-A53 CPU. According to the platform configuration, exports the `cpu_ops` for Cortex-A53 CPU. According to the platform
these CPU specific files must must be included in the build by the platform configuration, these CPU specific files must be included in the build by
makefile. The generic CPU specific operations framework code exists in the platform makefile. The generic CPU specific operations framework code exists
`lib/cpus/aarch64/cpu_helpers.S`. in `lib/cpus/aarch64/cpu_helpers.S`.
### CPU specific Reset Handling ### CPU specific Reset Handling
@ -1020,12 +1020,12 @@ entry is stored in per-CPU data by `init_cpu_ops()` so that it can be quickly
retrieved during power down sequences. retrieved during power down sequences.
The PSCI service, upon receiving a power down request, determines the highest The PSCI service, upon receiving a power down request, determines the highest
affinity level at which to execute power down sequence for a particular CPU and power level at which to execute power down sequence for a particular CPU and
invokes the corresponding 'prepare' power down handler in the CPU specific invokes the corresponding 'prepare' power down handler in the CPU specific
operations framework. For example, when a CPU executes a power down for affinity operations framework. For example, when a CPU executes a power down for power
level 0, the `prepare_core_pwr_dwn()` retrieves the `cpu_ops` pointer from the level 0, the `prepare_core_pwr_dwn()` retrieves the `cpu_ops` pointer from the
per-CPU data and the corresponding `core_pwr_dwn()` is invoked. Similarly when per-CPU data and the corresponding `core_pwr_dwn()` is invoked. Similarly when
a CPU executes power down at affinity level 1, the `prepare_cluster_pwr_dwn()` a CPU executes power down at power level 1, the `prepare_cluster_pwr_dwn()`
retrieves the `cpu_ops` pointer and the corresponding `cluster_pwr_dwn()` is retrieves the `cpu_ops` pointer and the corresponding `cluster_pwr_dwn()` is
invoked. invoked.
@ -1739,5 +1739,5 @@ _Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved._
[Porting Guide]: ./porting-guide.md [Porting Guide]: ./porting-guide.md
[Reset Design]: ./reset-design.md [Reset Design]: ./reset-design.md
[INTRG]: ./interrupt-framework-design.md [INTRG]: ./interrupt-framework-design.md
[CPUBM]: ./cpu-specific-build-macros.md.md [CPUBM]: ./cpu-specific-build-macros.md
[Firmware Update]: ./firmware-update.md [Firmware Update]: ./firmware-update.md