rcar_gen3: drivers: ddr-a: Replace {Read,Write}Reg_32() with mmio_{read,write}_32()
Replace ad-hoc register accessors with generic ones, remove the ad-hoc implementation. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I21446a00a38c6a39d6a48652c34f59814074e831
This commit is contained in:
Marek Vasut
parent
efe6eaabe1
commit
dfd80943d5
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -5,331 +5,321 @@
|
|||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include <lib/mmio.h>
|
||||
#include <lib/utils_def.h>
|
||||
#include <stdint.h>
|
||||
#include "boot_init_dram.h"
|
||||
#include "boot_init_dram_regdef.h"
|
||||
|
||||
static void WriteReg_32(uintptr_t a, uint32_t v)
|
||||
{
|
||||
*(volatile uint32_t*)a = v;
|
||||
}
|
||||
|
||||
static uint32_t ReadReg_32(uintptr_t a)
|
||||
{
|
||||
uint32_t w = *(volatile uint32_t*)a;
|
||||
return w;
|
||||
}
|
||||
|
||||
static uint32_t init_ddr_v3m_1600(void)
|
||||
{
|
||||
// last modified 2016.12.16
|
||||
|
||||
uint32_t RegVal_R2, RegVal_R5, RegVal_R6, RegVal_R7, RegVal_R12;
|
||||
|
||||
WriteReg_32(DBSC_DBSYSCNT0,0x00001234);
|
||||
WriteReg_32(DBSC_DBKIND,0x00000007);
|
||||
mmio_write_32(DBSC_DBSYSCNT0,0x00001234);
|
||||
mmio_write_32(DBSC_DBKIND,0x00000007);
|
||||
#if RCAR_DRAM_DDR3L_MEMCONF == 0
|
||||
WriteReg_32(DBSC_DBMEMCONF00,0x0f030a02); // 1GB: Eagle
|
||||
mmio_write_32(DBSC_DBMEMCONF00,0x0f030a02); // 1GB: Eagle
|
||||
#else
|
||||
WriteReg_32(DBSC_DBMEMCONF00,0x10030a02); // 2GB: V3MSK
|
||||
mmio_write_32(DBSC_DBMEMCONF00,0x10030a02); // 2GB: V3MSK
|
||||
#endif
|
||||
WriteReg_32(DBSC_DBPHYCONF0,0x00000001);
|
||||
WriteReg_32(DBSC_DBTR0,0x0000000B);
|
||||
WriteReg_32(DBSC_DBTR1,0x00000008);
|
||||
WriteReg_32(DBSC_DBTR3,0x0000000B);
|
||||
WriteReg_32(DBSC_DBTR4,0x000B000B);
|
||||
WriteReg_32(DBSC_DBTR5,0x00000027);
|
||||
WriteReg_32(DBSC_DBTR6,0x0000001C);
|
||||
WriteReg_32(DBSC_DBTR7,0x00060006);
|
||||
WriteReg_32(DBSC_DBTR8,0x00000020);
|
||||
WriteReg_32(DBSC_DBTR9,0x00000006);
|
||||
WriteReg_32(DBSC_DBTR10,0x0000000C);
|
||||
WriteReg_32(DBSC_DBTR11,0x0000000B);
|
||||
WriteReg_32(DBSC_DBTR12,0x00120012);
|
||||
WriteReg_32(DBSC_DBTR13,0x01180118);
|
||||
WriteReg_32(DBSC_DBTR14,0x00140005);
|
||||
WriteReg_32(DBSC_DBTR15,0x00050004);
|
||||
WriteReg_32(DBSC_DBTR16,0x071D0305);
|
||||
WriteReg_32(DBSC_DBTR17,0x040C0010);
|
||||
WriteReg_32(DBSC_DBTR18,0x00000200);
|
||||
WriteReg_32(DBSC_DBTR19,0x01000040);
|
||||
WriteReg_32(DBSC_DBTR20,0x02000120);
|
||||
WriteReg_32(DBSC_DBTR21,0x00040004);
|
||||
WriteReg_32(DBSC_DBBL,0x00000000);
|
||||
WriteReg_32(DBSC_DBODT0,0x00000001);
|
||||
WriteReg_32(DBSC_DBADJ0,0x00000001);
|
||||
WriteReg_32(DBSC_DBCAM0CNF1,0x00082010);
|
||||
WriteReg_32(DBSC_DBCAM0CNF2,0x00002000);
|
||||
WriteReg_32(DBSC_DBSCHCNT0,0x080f003f);
|
||||
WriteReg_32(DBSC_DBSCHCNT1,0x00001010);
|
||||
WriteReg_32(DBSC_DBSCHSZ0,0x00000001);
|
||||
WriteReg_32(DBSC_DBSCHRW0,0x00000200);
|
||||
WriteReg_32(DBSC_DBSCHRW1,0x00000040);
|
||||
WriteReg_32(DBSC_DBSCHQOS40,0x00000600);
|
||||
WriteReg_32(DBSC_DBSCHQOS41,0x00000480);
|
||||
WriteReg_32(DBSC_DBSCHQOS42,0x00000300);
|
||||
WriteReg_32(DBSC_DBSCHQOS43,0x00000180);
|
||||
WriteReg_32(DBSC_DBSCHQOS90,0x00000400);
|
||||
WriteReg_32(DBSC_DBSCHQOS91,0x00000300);
|
||||
WriteReg_32(DBSC_DBSCHQOS92,0x00000200);
|
||||
WriteReg_32(DBSC_DBSCHQOS93,0x00000100);
|
||||
WriteReg_32(DBSC_DBSCHQOS130,0x00000300);
|
||||
WriteReg_32(DBSC_DBSCHQOS131,0x00000240);
|
||||
WriteReg_32(DBSC_DBSCHQOS132,0x00000180);
|
||||
WriteReg_32(DBSC_DBSCHQOS133,0x000000c0);
|
||||
WriteReg_32(DBSC_DBSCHQOS140,0x00000200);
|
||||
WriteReg_32(DBSC_DBSCHQOS141,0x00000180);
|
||||
WriteReg_32(DBSC_DBSCHQOS142,0x00000100);
|
||||
WriteReg_32(DBSC_DBSCHQOS143,0x00000080);
|
||||
WriteReg_32(DBSC_DBSCHQOS150,0x00000100);
|
||||
WriteReg_32(DBSC_DBSCHQOS151,0x000000c0);
|
||||
WriteReg_32(DBSC_DBSCHQOS152,0x00000080);
|
||||
WriteReg_32(DBSC_DBSCHQOS153,0x00000040);
|
||||
WriteReg_32(DBSC_DBSYSCONF1,0x00000002);
|
||||
WriteReg_32(DBSC_DBCAM0CNF1,0x00040C04);
|
||||
WriteReg_32(DBSC_DBCAM0CNF2,0x000001c4);
|
||||
WriteReg_32(DBSC_DBSCHSZ0,0x00000003);
|
||||
WriteReg_32(DBSC_DBSCHRW1,0x001a0080);
|
||||
WriteReg_32(DBSC_DBDFICNT0,0x00000010);
|
||||
mmio_write_32(DBSC_DBPHYCONF0,0x00000001);
|
||||
mmio_write_32(DBSC_DBTR0,0x0000000B);
|
||||
mmio_write_32(DBSC_DBTR1,0x00000008);
|
||||
mmio_write_32(DBSC_DBTR3,0x0000000B);
|
||||
mmio_write_32(DBSC_DBTR4,0x000B000B);
|
||||
mmio_write_32(DBSC_DBTR5,0x00000027);
|
||||
mmio_write_32(DBSC_DBTR6,0x0000001C);
|
||||
mmio_write_32(DBSC_DBTR7,0x00060006);
|
||||
mmio_write_32(DBSC_DBTR8,0x00000020);
|
||||
mmio_write_32(DBSC_DBTR9,0x00000006);
|
||||
mmio_write_32(DBSC_DBTR10,0x0000000C);
|
||||
mmio_write_32(DBSC_DBTR11,0x0000000B);
|
||||
mmio_write_32(DBSC_DBTR12,0x00120012);
|
||||
mmio_write_32(DBSC_DBTR13,0x01180118);
|
||||
mmio_write_32(DBSC_DBTR14,0x00140005);
|
||||
mmio_write_32(DBSC_DBTR15,0x00050004);
|
||||
mmio_write_32(DBSC_DBTR16,0x071D0305);
|
||||
mmio_write_32(DBSC_DBTR17,0x040C0010);
|
||||
mmio_write_32(DBSC_DBTR18,0x00000200);
|
||||
mmio_write_32(DBSC_DBTR19,0x01000040);
|
||||
mmio_write_32(DBSC_DBTR20,0x02000120);
|
||||
mmio_write_32(DBSC_DBTR21,0x00040004);
|
||||
mmio_write_32(DBSC_DBBL,0x00000000);
|
||||
mmio_write_32(DBSC_DBODT0,0x00000001);
|
||||
mmio_write_32(DBSC_DBADJ0,0x00000001);
|
||||
mmio_write_32(DBSC_DBCAM0CNF1,0x00082010);
|
||||
mmio_write_32(DBSC_DBCAM0CNF2,0x00002000);
|
||||
mmio_write_32(DBSC_DBSCHCNT0,0x080f003f);
|
||||
mmio_write_32(DBSC_DBSCHCNT1,0x00001010);
|
||||
mmio_write_32(DBSC_DBSCHSZ0,0x00000001);
|
||||
mmio_write_32(DBSC_DBSCHRW0,0x00000200);
|
||||
mmio_write_32(DBSC_DBSCHRW1,0x00000040);
|
||||
mmio_write_32(DBSC_DBSCHQOS40,0x00000600);
|
||||
mmio_write_32(DBSC_DBSCHQOS41,0x00000480);
|
||||
mmio_write_32(DBSC_DBSCHQOS42,0x00000300);
|
||||
mmio_write_32(DBSC_DBSCHQOS43,0x00000180);
|
||||
mmio_write_32(DBSC_DBSCHQOS90,0x00000400);
|
||||
mmio_write_32(DBSC_DBSCHQOS91,0x00000300);
|
||||
mmio_write_32(DBSC_DBSCHQOS92,0x00000200);
|
||||
mmio_write_32(DBSC_DBSCHQOS93,0x00000100);
|
||||
mmio_write_32(DBSC_DBSCHQOS130,0x00000300);
|
||||
mmio_write_32(DBSC_DBSCHQOS131,0x00000240);
|
||||
mmio_write_32(DBSC_DBSCHQOS132,0x00000180);
|
||||
mmio_write_32(DBSC_DBSCHQOS133,0x000000c0);
|
||||
mmio_write_32(DBSC_DBSCHQOS140,0x00000200);
|
||||
mmio_write_32(DBSC_DBSCHQOS141,0x00000180);
|
||||
mmio_write_32(DBSC_DBSCHQOS142,0x00000100);
|
||||
mmio_write_32(DBSC_DBSCHQOS143,0x00000080);
|
||||
mmio_write_32(DBSC_DBSCHQOS150,0x00000100);
|
||||
mmio_write_32(DBSC_DBSCHQOS151,0x000000c0);
|
||||
mmio_write_32(DBSC_DBSCHQOS152,0x00000080);
|
||||
mmio_write_32(DBSC_DBSCHQOS153,0x00000040);
|
||||
mmio_write_32(DBSC_DBSYSCONF1,0x00000002);
|
||||
mmio_write_32(DBSC_DBCAM0CNF1,0x00040C04);
|
||||
mmio_write_32(DBSC_DBCAM0CNF2,0x000001c4);
|
||||
mmio_write_32(DBSC_DBSCHSZ0,0x00000003);
|
||||
mmio_write_32(DBSC_DBSCHRW1,0x001a0080);
|
||||
mmio_write_32(DBSC_DBDFICNT0,0x00000010);
|
||||
|
||||
WriteReg_32(DBSC_DBPDLK0,0X0000A55A);
|
||||
WriteReg_32(DBSC_DBCMD,0x01000001);
|
||||
WriteReg_32(DBSC_DBCMD,0x08000000);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000001);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X80010000);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 );
|
||||
mmio_write_32(DBSC_DBPDLK0,0X0000A55A);
|
||||
mmio_write_32(DBSC_DBCMD,0x01000001);
|
||||
mmio_write_32(DBSC_DBCMD,0x08000000);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000001);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X80010000);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 );
|
||||
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000008);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X000B8000);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000090);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X04058904);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000091);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X0007BB6D);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000095);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X0007BB6B);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000099);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X0007BB6D);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000090);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X04058900);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000021);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X0024641E);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000001);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X00010073);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 );
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000008);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X000B8000);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000090);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X04058904);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000091);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X0007BB6D);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000095);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X0007BB6B);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000099);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X0007BB6D);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000090);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X04058900);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000021);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X0024641E);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000001);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X00010073);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 );
|
||||
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000090);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X0C058900);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000090);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X04058900);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 );
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000090);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X0C058900);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000090);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X04058900);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 );
|
||||
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000003);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X0780C700);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000007);
|
||||
while ( (BIT(30)& ReadReg_32(DBSC_DBPDRGD0)) == 0 );
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000003);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X0780C700);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000007);
|
||||
while ( (BIT(30)& mmio_read_32(DBSC_DBPDRGD0)) == 0 );
|
||||
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000004);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X08C0C170);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000022);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X1000040B);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000023);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X2D9C0B66);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000024);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X2A88C400);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000025);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X30005200);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000026);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X0014A9C9);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000027);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X00000D70);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000028);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X00000004);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000029);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X00000018);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X0000002C);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X81003047);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000020);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X00181884);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X0000001A);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X13C03C10);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 );
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000004);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X08C0C170);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000022);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X1000040B);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000023);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X2D9C0B66);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000024);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X2A88C400);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000025);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X30005200);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000026);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X0014A9C9);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000027);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X00000D70);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000028);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X00000004);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000029);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X00000018);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X0000002C);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X81003047);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000020);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X00181884);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X0000001A);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X13C03C10);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 );
|
||||
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000A7);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X0D0D0D0D);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000A8);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X0D0D0D0D);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000A9);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X000D0D0D);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000C7);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X0D0D0D0D);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000C8);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X0D0D0D0D);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000C9);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X000D0D0D);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000E7);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X0D0D0D0D);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000E8);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X0D0D0D0D);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000E9);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X000D0D0D);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000107);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X0D0D0D0D);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000108);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X0D0D0D0D);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000109);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X000D0D0D);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000001);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X00010181);
|
||||
WriteReg_32(DBSC_DBCMD,0x08000001);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 );
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000A7);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X0D0D0D0D);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000A8);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X0D0D0D0D);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000A9);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X000D0D0D);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000C7);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X0D0D0D0D);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000C8);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X0D0D0D0D);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000C9);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X000D0D0D);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000E7);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X0D0D0D0D);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000E8);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X0D0D0D0D);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000E9);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X000D0D0D);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000107);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X0D0D0D0D);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000108);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X0D0D0D0D);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000109);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X000D0D0D);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000001);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X00010181);
|
||||
mmio_write_32(DBSC_DBCMD,0x08000001);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 );
|
||||
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000001);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X00010601);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 );
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000001);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X00010601);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 );
|
||||
|
||||
for (uint32_t i = 0; i<4; i++)
|
||||
{
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000B1 + i*0x20);
|
||||
RegVal_R5 = (ReadReg_32(DBSC_DBPDRGD0) & 0x0000FF00 ) >> 8;
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000B4 + i*0x20);
|
||||
RegVal_R6 = (ReadReg_32(DBSC_DBPDRGD0) & 0x000000FF ) ;
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000B3 + i*0x20);
|
||||
RegVal_R7 = (ReadReg_32(DBSC_DBPDRGD0) & 0x00000007 ) ;
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000B1 + i*0x20);
|
||||
RegVal_R5 = (mmio_read_32(DBSC_DBPDRGD0) & 0x0000FF00 ) >> 8;
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000B4 + i*0x20);
|
||||
RegVal_R6 = (mmio_read_32(DBSC_DBPDRGD0) & 0x000000FF ) ;
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000B3 + i*0x20);
|
||||
RegVal_R7 = (mmio_read_32(DBSC_DBPDRGD0) & 0x00000007 ) ;
|
||||
if ( RegVal_R6 > 0 )
|
||||
{
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000B2 + i*0x20);
|
||||
RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0XFFFFFFF8 ) ;
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000B2 + i*0x20);
|
||||
RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0XFFFFFFF8 ) ;
|
||||
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000B2 + i*0x20);
|
||||
WriteReg_32(DBSC_DBPDRGD0,((RegVal_R7+1)&0X00000007) | RegVal_R2);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000B0 + i*0x20);
|
||||
RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0XFFFFFF00 ) ;
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000B0 + i*0x20);
|
||||
WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | RegVal_R6);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000B2 + i*0x20);
|
||||
mmio_write_32(DBSC_DBPDRGD0,((RegVal_R7+1)&0X00000007) | RegVal_R2);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000B0 + i*0x20);
|
||||
RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0XFFFFFF00 ) ;
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000B0 + i*0x20);
|
||||
mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | RegVal_R6);
|
||||
} else {
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000B2 + i*0x20);
|
||||
RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0XFFFFFFF8 ) ;
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000B2 + i*0x20);
|
||||
WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | RegVal_R7);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000B2 + i*0x20);
|
||||
RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0XFFFFFFF8 ) ;
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000B2 + i*0x20);
|
||||
mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | RegVal_R7);
|
||||
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000B0 + i*0x20);
|
||||
RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0XFFFFFF00 ) ;
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000B0 + i*0x20);
|
||||
WriteReg_32(DBSC_DBPDRGD0,(((RegVal_R5<<1) + RegVal_R6 ) & 0X000000FF )| RegVal_R2);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000B0 + i*0x20);
|
||||
RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0XFFFFFF00 ) ;
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000B0 + i*0x20);
|
||||
mmio_write_32(DBSC_DBPDRGD0,(((RegVal_R5<<1) + RegVal_R6 ) & 0X000000FF )| RegVal_R2);
|
||||
}
|
||||
}
|
||||
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000005);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0XC1AA00A0);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000A0);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X7C0002C5);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000C0);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X7C0002C5);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000E0);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X7C0002C5);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000100);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X7C0002C5);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000001);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X00010801);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 );
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000005);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0XC1AA00A0);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000A0);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X7C0002C5);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000C0);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X7C0002C5);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000E0);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X7C0002C5);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000100);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X7C0002C5);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000001);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X00010801);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 );
|
||||
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000005);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0XC1AA00B8);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000001);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X0001F001);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 );
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000005);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0XC1AA00B8);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000001);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X0001F001);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 );
|
||||
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000A0);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X7C000285);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000C0);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X7C000285);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000E0);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X7C000285);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000100);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X7C000285);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X0000002C);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X81003087);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000001);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X00010401);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 );
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000A0);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X7C000285);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000C0);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X7C000285);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000E0);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X7C000285);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000100);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X7C000285);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X0000002C);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X81003087);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000001);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X00010401);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 );
|
||||
|
||||
for (uint32_t i = 0; i < 4; i++)
|
||||
{
|
||||
WriteReg_32(DBSC_DBPDRGA0, 0X000000B1 + i * 0x20);
|
||||
RegVal_R5 = (ReadReg_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 8;
|
||||
WriteReg_32(DBSC_DBPDRGA0, 0X000000B4 + i * 0x20);
|
||||
RegVal_R6 = (ReadReg_32(DBSC_DBPDRGD0) & 0x000000FF);
|
||||
mmio_write_32(DBSC_DBPDRGA0, 0X000000B1 + i * 0x20);
|
||||
RegVal_R5 = (mmio_read_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 8;
|
||||
mmio_write_32(DBSC_DBPDRGA0, 0X000000B4 + i * 0x20);
|
||||
RegVal_R6 = (mmio_read_32(DBSC_DBPDRGD0) & 0x000000FF);
|
||||
|
||||
WriteReg_32(DBSC_DBPDRGA0, 0X000000B3 + i * 0x20);
|
||||
RegVal_R7 = (ReadReg_32(DBSC_DBPDRGD0) & 0x00000007);
|
||||
mmio_write_32(DBSC_DBPDRGA0, 0X000000B3 + i * 0x20);
|
||||
RegVal_R7 = (mmio_read_32(DBSC_DBPDRGD0) & 0x00000007);
|
||||
RegVal_R12 = (RegVal_R5 >> 2);
|
||||
if (RegVal_R6 - RegVal_R12 > 0)
|
||||
{
|
||||
WriteReg_32(DBSC_DBPDRGA0, 0X000000B2 + i * 0x20);
|
||||
RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0XFFFFFFF8);
|
||||
mmio_write_32(DBSC_DBPDRGA0, 0X000000B2 + i * 0x20);
|
||||
RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0XFFFFFFF8);
|
||||
|
||||
WriteReg_32(DBSC_DBPDRGA0, 0X000000B2 + i * 0x20);
|
||||
WriteReg_32(DBSC_DBPDRGD0, ((RegVal_R7 + 1) & 0X00000007) | RegVal_R2);
|
||||
WriteReg_32(DBSC_DBPDRGA0, 0X000000B0 + i * 0x20);
|
||||
RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0XFFFFFF00);
|
||||
mmio_write_32(DBSC_DBPDRGA0, 0X000000B2 + i * 0x20);
|
||||
mmio_write_32(DBSC_DBPDRGD0, ((RegVal_R7 + 1) & 0X00000007) | RegVal_R2);
|
||||
mmio_write_32(DBSC_DBPDRGA0, 0X000000B0 + i * 0x20);
|
||||
RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0XFFFFFF00);
|
||||
|
||||
WriteReg_32(DBSC_DBPDRGA0, 0X000000B0 + i * 0x20);
|
||||
WriteReg_32(DBSC_DBPDRGD0, ((RegVal_R6 - RegVal_R12) & 0X000000FF) | RegVal_R2);
|
||||
mmio_write_32(DBSC_DBPDRGA0, 0X000000B0 + i * 0x20);
|
||||
mmio_write_32(DBSC_DBPDRGD0, ((RegVal_R6 - RegVal_R12) & 0X000000FF) | RegVal_R2);
|
||||
}
|
||||
else
|
||||
{
|
||||
WriteReg_32(DBSC_DBPDRGA0, 0X000000B2 + i * 0x20);
|
||||
RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0XFFFFFFF8);
|
||||
WriteReg_32(DBSC_DBPDRGA0, 0X000000B2 + i * 0x20);
|
||||
WriteReg_32(DBSC_DBPDRGD0, (RegVal_R7 & 0X00000007) | RegVal_R2);
|
||||
WriteReg_32(DBSC_DBPDRGA0, 0X000000B0 + i * 0x20);
|
||||
RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0XFFFFFF00);
|
||||
WriteReg_32(DBSC_DBPDRGA0, 0X000000B0 + i * 0x20);
|
||||
WriteReg_32(DBSC_DBPDRGD0, ((RegVal_R6 + RegVal_R5 + (RegVal_R5 >> 1) + RegVal_R12) & 0X000000FF) | RegVal_R2);
|
||||
mmio_write_32(DBSC_DBPDRGA0, 0X000000B2 + i * 0x20);
|
||||
RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0XFFFFFFF8);
|
||||
mmio_write_32(DBSC_DBPDRGA0, 0X000000B2 + i * 0x20);
|
||||
mmio_write_32(DBSC_DBPDRGD0, (RegVal_R7 & 0X00000007) | RegVal_R2);
|
||||
mmio_write_32(DBSC_DBPDRGA0, 0X000000B0 + i * 0x20);
|
||||
RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0XFFFFFF00);
|
||||
mmio_write_32(DBSC_DBPDRGA0, 0X000000B0 + i * 0x20);
|
||||
mmio_write_32(DBSC_DBPDRGD0, ((RegVal_R6 + RegVal_R5 + (RegVal_R5 >> 1) + RegVal_R12) & 0X000000FF) | RegVal_R2);
|
||||
}
|
||||
}
|
||||
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000A0);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X7C0002C5);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000C0);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X7C0002C5);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X000000E0);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X7C0002C5);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000100);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X7C0002C5);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000001);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X00015001);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 );
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000A0);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X7C0002C5);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000C0);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X7C0002C5);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X000000E0);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X7C0002C5);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000100);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X7C0002C5);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000001);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X00015001);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000006);
|
||||
while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 );
|
||||
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000003);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X0380C700);
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000007);
|
||||
while ( (BIT(30)& ReadReg_32(DBSC_DBPDRGD0)) != 0 );
|
||||
WriteReg_32(DBSC_DBPDRGA0,0X00000021);
|
||||
WriteReg_32(DBSC_DBPDRGD0,0X0024643E);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000003);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X0380C700);
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000007);
|
||||
while ( (BIT(30)& mmio_read_32(DBSC_DBPDRGD0)) != 0 );
|
||||
mmio_write_32(DBSC_DBPDRGA0,0X00000021);
|
||||
mmio_write_32(DBSC_DBPDRGD0,0X0024643E);
|
||||
|
||||
WriteReg_32(DBSC_DBBUS0CNF1,0x00000000);
|
||||
WriteReg_32(DBSC_DBBUS0CNF0,0x00010001);
|
||||
WriteReg_32(DBSC_DBCALCNF,0x0100200E);
|
||||
WriteReg_32(DBSC_DBRFCNF1,0x00081860);
|
||||
WriteReg_32(DBSC_DBRFCNF2,0x00010000);
|
||||
WriteReg_32(DBSC_DBDFICUPDCNF,0x40100001);
|
||||
WriteReg_32(DBSC_DBRFEN,0x00000001);
|
||||
WriteReg_32(DBSC_DBACEN,0x00000001);
|
||||
WriteReg_32(DBSC_DBPDLK0,0X00000000);
|
||||
WriteReg_32(0xE67F0024, 0x00000001);
|
||||
WriteReg_32(DBSC_DBSYSCNT0,0x00000000);
|
||||
mmio_write_32(DBSC_DBBUS0CNF1,0x00000000);
|
||||
mmio_write_32(DBSC_DBBUS0CNF0,0x00010001);
|
||||
mmio_write_32(DBSC_DBCALCNF,0x0100200E);
|
||||
mmio_write_32(DBSC_DBRFCNF1,0x00081860);
|
||||
mmio_write_32(DBSC_DBRFCNF2,0x00010000);
|
||||
mmio_write_32(DBSC_DBDFICUPDCNF,0x40100001);
|
||||
mmio_write_32(DBSC_DBRFEN,0x00000001);
|
||||
mmio_write_32(DBSC_DBACEN,0x00000001);
|
||||
mmio_write_32(DBSC_DBPDLK0,0X00000000);
|
||||
mmio_write_32(0xE67F0024, 0x00000001);
|
||||
mmio_write_32(DBSC_DBSYSCNT0,0x00000000);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue