From 8e083ecd66fa93c9c9d488cf4b728f526401054c Mon Sep 17 00:00:00 2001 From: Vikram Kanigiri Date: Mon, 8 Feb 2016 16:29:30 +0000 Subject: [PATCH 1/2] Support for varying BOM/SCPI protocol base addresses in ARM platforms Current code assumes `SCP_COM_SHARED_MEM_BASE` as the base address for BOM/SCPI protocol between AP<->SCP on all CSS platforms. To cater for future ARM platforms this is made platform specific. Similarly, the bit shifts of `SCP_BOOT_CONFIG_ADDR` are also made platform specific. Change-Id: Ie8866c167abf0229a37b3c72576917f085c142e8 --- include/plat/arm/css/common/css_def.h | 19 +++---------------- plat/arm/board/juno/include/platform_def.h | 16 +++++++++++++++- plat/arm/css/common/aarch64/css_helpers.S | 5 +++-- plat/arm/css/common/css_scp_bootloader.c | 4 ++-- plat/arm/css/common/css_scpi.c | 7 ++++--- 5 files changed, 27 insertions(+), 24 deletions(-) diff --git a/include/plat/arm/css/common/css_def.h b/include/plat/arm/css/common/css_def.h index c900278b5..79bb44c84 100644 --- a/include/plat/arm/css/common/css_def.h +++ b/include/plat/arm/css/common/css_def.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -78,25 +78,12 @@ * SCP <=> AP boot configuration * * The SCP/AP boot configuration is a 32-bit word located at a known offset from - * the start of the Trusted SRAM. Part of this configuration is which CPU is the - * primary, according to the shift and mask definitions below. + * the start of the Trusted SRAM. * * Note that the value stored at this address is only valid at boot time, before * the SCP_BL2 image is transferred to SCP. */ -#define SCP_BOOT_CFG_ADDR (ARM_TRUSTED_SRAM_BASE + 0x80) -#define PRIMARY_CPU_SHIFT 8 -#define PRIMARY_CPU_BIT_WIDTH 4 - -/* - * Base address of the first memory region used for communication between AP - * and SCP. Used by the BOM and SCPI protocols. - * - * Note that this is located at the same address as SCP_BOOT_CFG_ADDR, which - * means the SCP/AP configuration data gets overwritten when the AP initiates - * communication with the SCP. - */ -#define SCP_COM_SHARED_MEM_BASE (ARM_TRUSTED_SRAM_BASE + 0x80) +#define SCP_BOOT_CFG_ADDR PLAT_CSS_SCP_COM_SHARED_MEM_BASE #define CSS_MAP_DEVICE MAP_REGION_FLAT( \ CSS_DEVICE_BASE, \ diff --git a/plat/arm/board/juno/include/platform_def.h b/plat/arm/board/juno/include/platform_def.h index 924eb0ab7..0cffbe827 100644 --- a/plat/arm/board/juno/include/platform_def.h +++ b/plat/arm/board/juno/include/platform_def.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -99,6 +99,20 @@ #define PLAT_ARM_GICH_BASE 0x2c04f000 #define PLAT_ARM_GICV_BASE 0x2c06f000 +/* + * Base address of the first memory region used for communication between AP + * and SCP. Used by the BOM and SCPI protocols. + * + * Note that this is located at the same address as SCP_BOOT_CFG_ADDR, which + * means the SCP/AP configuration data gets overwritten when the AP initiates + * communication with the SCP. The configuration data is expected to be a + * 32-bit word on all CSS platforms. On Juno, part of this configuration is + * which CPU is the primary, according to the shift and mask definitions below. + */ +#define PLAT_CSS_SCP_COM_SHARED_MEM_BASE (ARM_TRUSTED_SRAM_BASE + 0x80) +#define PLAT_CSS_PRIMARY_CPU_SHIFT 8 +#define PLAT_CSS_PRIMARY_CPU_BIT_WIDTH 4 + /* * Define a list of Group 1 Secure and Group 0 interrupts as per GICv3 * terminology. On a GICv2 system or mode, the lists will be merged and treated diff --git a/plat/arm/css/common/aarch64/css_helpers.S b/plat/arm/css/common/aarch64/css_helpers.S index 27476186d..0763a3ec2 100644 --- a/plat/arm/css/common/aarch64/css_helpers.S +++ b/plat/arm/css/common/aarch64/css_helpers.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -117,7 +117,8 @@ func plat_is_my_cpu_primary bl plat_my_core_pos ldr x1, =SCP_BOOT_CFG_ADDR ldr x1, [x1] - ubfx x1, x1, #PRIMARY_CPU_SHIFT, #PRIMARY_CPU_BIT_WIDTH + ubfx x1, x1, #PLAT_CSS_PRIMARY_CPU_SHIFT, \ + #PLAT_CSS_PRIMARY_CPU_BIT_WIDTH cmp x0, x1 cset w0, eq ret x9 diff --git a/plat/arm/css/common/css_scp_bootloader.c b/plat/arm/css/common/css_scp_bootloader.c index c01f42fbd..8bfaa87c7 100644 --- a/plat/arm/css/common/css_scp_bootloader.c +++ b/plat/arm/css/common/css_scp_bootloader.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -60,7 +60,7 @@ typedef struct { * Unlike the SCPI protocol, the boot protocol uses the same memory region * for both AP -> SCP and SCP -> AP transfers; define the address of this... */ -#define BOM_SHARED_MEM SCP_COM_SHARED_MEM_BASE +#define BOM_SHARED_MEM PLAT_CSS_SCP_COM_SHARED_MEM_BASE #define BOM_CMD_HEADER ((bom_cmd_t *) BOM_SHARED_MEM) #define BOM_CMD_PAYLOAD ((void *) (BOM_SHARED_MEM + sizeof(bom_cmd_t))) diff --git a/plat/arm/css/common/css_scpi.c b/plat/arm/css/common/css_scpi.c index 0a4eafe0c..9e1f9738c 100644 --- a/plat/arm/css/common/css_scpi.c +++ b/plat/arm/css/common/css_scpi.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -37,8 +37,9 @@ #include "css_mhu.h" #include "css_scpi.h" -#define SCPI_SHARED_MEM_SCP_TO_AP SCP_COM_SHARED_MEM_BASE -#define SCPI_SHARED_MEM_AP_TO_SCP (SCP_COM_SHARED_MEM_BASE + 0x100) +#define SCPI_SHARED_MEM_SCP_TO_AP PLAT_CSS_SCP_COM_SHARED_MEM_BASE +#define SCPI_SHARED_MEM_AP_TO_SCP (PLAT_CSS_SCP_COM_SHARED_MEM_BASE \ + + 0x100) #define SCPI_CMD_HEADER_AP_TO_SCP \ ((scpi_cmd_t *) SCPI_SHARED_MEM_AP_TO_SCP) From 7fb9a32d2ea8c5f5fb07d5c7a2f3f3ef8c92a7d0 Mon Sep 17 00:00:00 2001 From: Vikram Kanigiri Date: Thu, 14 Jan 2016 14:26:27 +0000 Subject: [PATCH 2/2] Make SCP_BL2(U) image loading configurable on CSS platforms Current code mandates loading of SCP_BL2/SCP_BL2U images for all CSS platforms. On future ARM CSS platforms, the Application Processor (AP) might not need to load these images. So, these items can be removed from the FIP on those platforms. BL2 tries to load SCP_BL2/SCP_BL2U images if their base addresses are defined causing boot error if the images are not found in FIP. This change adds a make flag `CSS_LOAD_SCP_IMAGES` which if set to `1` does: 1. Adds SCP_BL2, SCP_BL2U images to FIP. 2. Defines the base addresses of these images so that AP loads them. And vice-versa if it is set to `0`. The default value is set to `1`. Change-Id: I5abfe22d5dc1e9d80d7809acefc87b42a462204a --- docs/user-guide.md | 4 ++++ include/plat/arm/css/common/css_def.h | 8 ++++++++ plat/arm/css/common/css_common.mk | 26 ++++++++++++++++++-------- 3 files changed, 30 insertions(+), 8 deletions(-) diff --git a/docs/user-guide.md b/docs/user-guide.md index e69291345..7fd765815 100644 --- a/docs/user-guide.md +++ b/docs/user-guide.md @@ -471,6 +471,10 @@ map is explained in the [Firmware Design]. set to 1 then Trusted Firmware will detect if an earlier version is in use. Default is 1. +* `CSS_LOAD_SCP_IMAGES`: Boolean flag, which when set, adds SCP_BL2 and + SCP_BL2U to the FIP and FWU_FIP respectively, and enables them to be loaded + during boot. Default is 1. + #### ARM FVP platform specific build options * `FVP_USE_GIC_DRIVER` : Selects the GIC driver to be built. Options: diff --git a/include/plat/arm/css/common/css_def.h b/include/plat/arm/css/common/css_def.h index 79bb44c84..aa802a588 100644 --- a/include/plat/arm/css/common/css_def.h +++ b/include/plat/arm/css/common/css_def.h @@ -96,6 +96,13 @@ * ARM Compute SubSystems (CSS) ************************************************************************/ +/* + * The loading of SCP images(SCP_BL2 or SCP_BL2U) is done if there + * respective base addresses are defined (i.e SCP_BL2_BASE, SCP_BL2U_BASE). + * Hence, `CSS_LOAD_SCP_IMAGES` needs to be set to 1 if BL2 needs to load + * an SCP_BL2/SCP_BL2U image. + */ +#if CSS_LOAD_SCP_IMAGES /* * Load address of SCP_BL2 in CSS platform ports * SCP_BL2 is loaded to the same place as BL31. Once SCP_BL2 is transferred to the @@ -104,6 +111,7 @@ #define SCP_BL2_BASE BL31_BASE #define SCP_BL2U_BASE BL31_BASE +#endif /* CSS_LOAD_SCP_IMAGES */ #define PLAT_ARM_SHARED_RAM_CACHED MHU_PAYLOAD_CACHED diff --git a/plat/arm/css/common/css_common.mk b/plat/arm/css/common/css_common.mk index 6a8773dda..65e125eab 100644 --- a/plat/arm/css/common/css_common.mk +++ b/plat/arm/css/common/css_common.mk @@ -1,5 +1,5 @@ # -# Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. +# Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions are met: @@ -28,6 +28,10 @@ # POSSIBILITY OF SUCH DAMAGE. # + +# By default, SCP images are needed by CSS platforms. +CSS_LOAD_SCP_IMAGES ?= 1 + PLAT_INCLUDES += -Iinclude/plat/arm/css/common \ -Iinclude/plat/arm/css/common/aarch64 @@ -38,12 +42,10 @@ BL1_SOURCES += plat/arm/css/common/css_bl1_setup.c BL2_SOURCES += plat/arm/css/common/css_bl2_setup.c \ plat/arm/css/common/css_mhu.c \ - plat/arm/css/common/css_scp_bootloader.c \ plat/arm/css/common/css_scpi.c BL2U_SOURCES += plat/arm/css/common/css_bl2u_setup.c \ plat/arm/css/common/css_mhu.c \ - plat/arm/css/common/css_scp_bootloader.c \ plat/arm/css/common/css_scpi.c BL31_SOURCES += plat/arm/css/common/css_mhu.c \ @@ -51,17 +53,25 @@ BL31_SOURCES += plat/arm/css/common/css_mhu.c \ plat/arm/css/common/css_scpi.c \ plat/arm/css/common/css_topology.c -ifneq (${TRUSTED_BOARD_BOOT},0) -$(eval $(call FWU_FIP_ADD_IMG,SCP_BL2U,--scp-fwu-cfg)) -endif ifneq (${RESET_TO_BL31},0) $(error "Using BL31 as the reset vector is not supported on CSS platforms. \ Please set RESET_TO_BL31 to 0.") endif -# Subsystems require a SCP_BL2 image -$(eval $(call FIP_ADD_IMG,SCP_BL2,--scp-fw)) +# Process CSS_LOAD_SCP_IMAGES flag +$(eval $(call assert_boolean,CSS_LOAD_SCP_IMAGES)) +$(eval $(call add_define,CSS_LOAD_SCP_IMAGES)) + +ifeq (${CSS_LOAD_SCP_IMAGES},1) + $(eval $(call FIP_ADD_IMG,SCP_BL2,--scp-fw)) + ifneq (${TRUSTED_BOARD_BOOT},0) + $(eval $(call FWU_FIP_ADD_IMG,SCP_BL2U,--scp-fwu-cfg)) + endif + + BL2U_SOURCES += plat/arm/css/common/css_scp_bootloader.c + BL2_SOURCES += plat/arm/css/common/css_scp_bootloader.c +endif # Enable option to detect whether the SCP ROM firmware in use predates version # 1.7.0 and therefore, is incompatible.