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mediatek: mt8195: add sys_cirq support 

MT8192 cirq driver can be shared with MT8195. Move cirq driver to common
common folder.

Signed-off-by: gtk_pangao <gtk_pangao@mediatek.com>
Change-Id: Iba5cdcfd2116f0bd07e0497250f2da45613e3a4f
This commit is contained in:
gtk_pangao 2021-03-25 11:26:46 +08:00 committed by Yidi Lin
parent c63f1451e2
commit e5490f9557
8 changed files with 17 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
plat/mediatek/mt8192/plat_mt_cirq.c → plat/mediatek/common/mtk_cirq.c
View File

@ -10,8 +10,7 @@
#include <lib/mmio.h>
#include <mt_gic_v3.h>
#include <plat_mt_cirq.h>
#include <platform_def.h>
#include <mtk_cirq.h>
static struct cirq_events cirq_all_events = {
.spi_start = CIRQ_SPI_START,

8
plat/mediatek/mt8192/include/plat_mt_cirq.h → plat/mediatek/common/mtk_cirq.h
View File

@ -8,6 +8,7 @@
#define PLAT_MT_CIRQ_H
#include <stdint.h>
#include <platform_def.h>
enum {
IRQ_MASK_HEADER = 0xF1F1F1F1,
@ -35,13 +36,6 @@ struct mtk_irq_mask {
/*
* Define hardware register
*/
#define SYS_CIRQ_BASE U(0x10204000)
#define CIRQ_REG_NUM U(14)
#define CIRQ_IRQ_NUM U(439)
#define CIRQ_SPI_START U(64)
#define MD_WDT_IRQ_BIT_ID U(110)
#define CIRQ_STA_BASE (SYS_CIRQ_BASE + U(0x000))
#define CIRQ_ACK_BASE (SYS_CIRQ_BASE + U(0x080))
#define CIRQ_MASK_BASE (SYS_CIRQ_BASE + U(0x100))

2
plat/mediatek/mt8192/drivers/mcdi/mt_lp_irqremain.c
View File

@ -6,8 +6,8 @@
#include <mt_lp_rm.h>
#include <mt_lp_irqremain.h>
#include <mtk_cirq.h>
#include <plat_mtk_lpm.h>
#include <plat_mt_cirq.h>
#define EDMA0_IRQ_ID U(448)
#define MDLA_IRQ_ID U(446)

2
plat/mediatek/mt8192/drivers/spm/constraints/mt_spm_rc_bus26m.c
View File

@ -24,7 +24,7 @@
#ifndef ATF_PLAT_CIRQ_UNSUPPORT
#include <mt_gic_v3.h>
#include <plat_mt_cirq.h>
#include <mtk_cirq.h>
#endif
#define CONSTRAINT_BUS26M_ALLOW \

6
plat/mediatek/mt8192/include/platform_def.h
View File

@ -68,6 +68,12 @@
#define BASE_GICD_BASE MT_GIC_BASE
#define MT_GIC_RDIST_BASE (MT_GIC_BASE + 0x40000)
#define SYS_CIRQ_BASE (IO_PHYS + 0x204000)
#define CIRQ_REG_NUM 14
#define CIRQ_IRQ_NUM 439
#define CIRQ_SPI_START 64
#define MD_WDT_IRQ_BIT_ID 110
/*******************************************************************************
* Platform binary types for linking
******************************************************************************/

2
plat/mediatek/mt8192/platform.mk
View File

@ -46,6 +46,7 @@ BL31_SOURCES += common/desc_image_load.c \
${MTK_PLAT}/common/drivers/rtc/rtc_common.c \
${MTK_PLAT}/common/drivers/uart/uart.c \
${MTK_PLAT}/common/lpm/mt_lp_rm.c \
${MTK_PLAT}/common/mtk_cirq.c \
${MTK_PLAT}/common/mtk_plat_common.c \
${MTK_PLAT}/common/mtk_sip_svc.c \
${MTK_PLAT}/common/params_setup.c \
@ -56,7 +57,6 @@ BL31_SOURCES += common/desc_image_load.c \
${MTK_PLAT_SOC}/drivers/rtc/rtc.c \
${MTK_PLAT_SOC}/plat_pm.c \
${MTK_PLAT_SOC}/plat_topology.c \
${MTK_PLAT_SOC}/plat_mt_cirq.c \
${MTK_PLAT_SOC}/plat_sip_calls.c \
${MTK_PLAT_SOC}/drivers/dcm/mtk_dcm.c \
${MTK_PLAT_SOC}/drivers/dcm/mtk_dcm_utils.c \

5
plat/mediatek/mt8195/include/platform_def.h
View File

@ -43,6 +43,11 @@
#define BASE_GICD_BASE MT_GIC_BASE
#define MT_GIC_RDIST_BASE (MT_GIC_BASE + 0x40000)
#define SYS_CIRQ_BASE (IO_PHYS + 0x204000)
#define CIRQ_REG_NUM 23
#define CIRQ_IRQ_NUM 730
#define CIRQ_SPI_START 96
#define MD_WDT_IRQ_BIT_ID 141
/*******************************************************************************
* Platform binary types for linking
******************************************************************************/

1
plat/mediatek/mt8195/platform.mk
View File

@ -28,6 +28,7 @@ BL31_SOURCES += common/desc_image_load.c \
lib/cpus/aarch64/cortex_a78.S \
plat/common/plat_gicv3.c \
${MTK_PLAT}/common/drivers/gic600/mt_gic_v3.c \
${MTK_PLAT}/common/mtk_cirq.c \
${MTK_PLAT}/common/mtk_plat_common.c \
${MTK_PLAT}/common/params_setup.c \
${MTK_PLAT_SOC}/aarch64/platform_common.c \