refactor(stm32mp1): update backup reg for FWU

Change the backup register used to store FWU parameters from 21 to 10.
This is chosen to have a Read/Write secure and Read non-secure register.
The mapping is also changed: only the first 4 bits will be used to store
the FWU index. The 4 next bits will be used to store count info. The
other bits are reserved.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Change-Id: I9249768287ec5688ba2d8711ce04d429763543d7
This commit is contained in:
Yann Gautier 2022-03-28 17:49:38 +02:00
parent f78cb61a11
commit e633f9c52f
1 changed files with 14 additions and 3 deletions

View File

@ -46,7 +46,16 @@
#define TAMP_BOOT_MODE_ITF_MASK U(0x0000FF00)
#define TAMP_BOOT_MODE_ITF_SHIFT 8
#define TAMP_BOOT_COUNTER_REG_ID U(21)
/*
* Backup register to store fwu update information.
* It should be writeable only by secure world, but also readable by non secure
* (so it should be in Zone 2).
*/
#define TAMP_BOOT_FWU_INFO_REG_ID U(10)
#define TAMP_BOOT_FWU_INFO_IDX_MSK U(0xF)
#define TAMP_BOOT_FWU_INFO_IDX_OFF U(0)
#define TAMP_BOOT_FWU_INFO_CNT_MSK U(0xF0)
#define TAMP_BOOT_FWU_INFO_CNT_OFF U(4)
#if defined(IMAGE_BL2)
#define MAP_SEC_SYSRAM MAP_REGION_FLAT(STM32MP_SYSRAM_BASE, \
@ -733,8 +742,10 @@ void stm32_get_boot_interface(uint32_t *interface, uint32_t *instance)
void stm32mp1_fwu_set_boot_idx(void)
{
clk_enable(RTCAPB);
mmio_write_32(tamp_bkpr(TAMP_BOOT_COUNTER_REG_ID),
plat_fwu_get_boot_idx());
mmio_clrsetbits_32(tamp_bkpr(TAMP_BOOT_FWU_INFO_REG_ID),
TAMP_BOOT_FWU_INFO_IDX_MSK,
(plat_fwu_get_boot_idx() << TAMP_BOOT_FWU_INFO_IDX_OFF) &
TAMP_BOOT_FWU_INFO_IDX_MSK);
clk_disable(RTCAPB);
}
#endif /* !STM32MP_USE_STM32IMAGE && PSA_FWU_SUPPORT */