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cpus: denver: fixup register used to store return address 

The denver_enable_dco and denver_disable_dco use register X3 to store
the return address. But X3 gets over-written by other functions,
downstream.

This patch stores the return address to X18 instead, to fix this
anomaly.

Change-Id: Ic40bfc1d9abaa7b90348843b9ecd09521bb4ee7b
Signed-off-by: Kalyani Chidambaram <kalyanic@nvidia.com>
This commit is contained in:
Kalyani Chidambaram 2018-10-08 17:01:01 -07:00 committed by Varun Wadekar
parent efe30cb1b4
commit e6c0da159b
1 changed files with 4 additions and 4 deletions
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8
lib/cpus/aarch64/denver.S
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@ -156,12 +156,12 @@ endfunc denver_disable_ext_debug
* ----------------------------------------------------
*/
func denver_enable_dco
mov x3, x30
mov x18, x30
bl plat_my_core_pos
mov x1, #1
lsl x1, x1, x0
msr s3_0_c15_c0_2, x1
mov x30, x3
mov x30, x18
ret
endfunc denver_enable_dco
@ -171,7 +171,7 @@ endfunc denver_enable_dco
*/
func denver_disable_dco
mov x3, x30
mov x18, x30
/* turn off background work */
bl plat_my_core_pos
@ -188,7 +188,7 @@ func denver_disable_dco
and x2, x2, x1
cbnz x2, 1b
mov x30, x3
mov x30, x18
ret
endfunc denver_disable_dco