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Merge "gic multichip: add support for clayton" into integration

This commit is contained in:
Alexei Fedorov 2020-04-07 17:30:40 +00:00 committed by TrustedFirmware Code Review
parent 994421a6de b24ece54e0
commit e7e1cf51cd
1 changed files with 12 additions and 2 deletions
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14
drivers/arm/gic/v3/gic600_multichip_private.h
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@ -24,11 +24,21 @@
/* GIC600 GICD multichip related shifts */
#define GICD_CHIPRx_ADDR_SHIFT 16
#define GICD_CHIPRx_SPI_BLOCK_MIN_SHIFT 10
#define GICD_CHIPRx_SPI_BLOCKS_SHIFT 5
#define GICD_CHIPSR_RTS_SHIFT 4
#define GICD_DCHIPR_RT_OWNER_SHIFT 4
/*
* If GIC v4 extension is enabled, then use SPI macros specific to GIC-Clayton.
* Other shifts and mask remains same between GIC-600 and GIC-Clayton.
*/
#if GIC_ENABLE_V4_EXTN
#define GICD_CHIPRx_SPI_BLOCK_MIN_SHIFT 9
#define GICD_CHIPRx_SPI_BLOCKS_SHIFT 3
#else
#define GICD_CHIPRx_SPI_BLOCK_MIN_SHIFT 10
#define GICD_CHIPRx_SPI_BLOCKS_SHIFT 5
#endif
#define GICD_CHIPSR_RTS_STATE_DISCONNECTED U(0)
#define GICD_CHIPSR_RTS_STATE_UPDATING U(1)
#define GICD_CHIPSR_RTS_STATE_CONSISTENT U(2)