From e8a953a9b85806f7324c8c7245435d5b9226c279 Mon Sep 17 00:00:00 2001 From: Yann Gautier Date: Wed, 20 Oct 2021 17:22:32 +0200 Subject: [PATCH] feat(fdts stm32mp1): align DT with latest kernel Update STM32MP1 device tree files with kernel 5.15. Change-Id: Id405a79e18c61e80cd2292a4f87b7b9641df9c82 Signed-off-by: Yann Gautier --- fdts/stm32mp15-bl2.dtsi | 4 -- fdts/stm32mp15-bl32.dtsi | 6 +- fdts/stm32mp15-pinctrl.dtsi | 109 +++++++++++++++++++++++++++----- fdts/stm32mp151.dtsi | 8 +-- fdts/stm32mp157c-ed1.dts | 3 +- fdts/stm32mp157c-ev1.dts | 3 +- fdts/stm32mp157c-lxa-mc1.dts | 16 +---- fdts/stm32mp15xx-dkx.dtsi | 5 +- fdts/stm32mp15xxaa-pinctrl.dtsi | 2 +- fdts/stm32mp15xxab-pinctrl.dtsi | 2 +- fdts/stm32mp15xxac-pinctrl.dtsi | 2 +- fdts/stm32mp15xxad-pinctrl.dtsi | 2 +- 12 files changed, 110 insertions(+), 52 deletions(-) diff --git a/fdts/stm32mp15-bl2.dtsi b/fdts/stm32mp15-bl2.dtsi index da95b25de..080b77212 100644 --- a/fdts/stm32mp15-bl2.dtsi +++ b/fdts/stm32mp15-bl2.dtsi @@ -22,10 +22,6 @@ /delete-node/ stgen@5c008000; /delete-node/ i2c@5c009000; /delete-node/ tamp@5c00a000; - - pin-controller@50002000 { - /delete-node/ rtc-out2-rmp-pins-0; - }; }; #if !STM32MP_USE_STM32IMAGE diff --git a/fdts/stm32mp15-bl32.dtsi b/fdts/stm32mp15-bl32.dtsi index f005d563b..ca4bb3ea5 100644 --- a/fdts/stm32mp15-bl32.dtsi +++ b/fdts/stm32mp15-bl32.dtsi @@ -20,8 +20,8 @@ /delete-node/ hash@54002000; /delete-node/ memory-controller@58002000; /delete-node/ spi@58003000; - /delete-node/ sdmmc@58005000; - /delete-node/ sdmmc@58007000; + /delete-node/ mmc@58005000; + /delete-node/ mmc@58007000; /delete-node/ usbphyc@5a006000; /delete-node/ spi@5c001000; /delete-node/ stgen@5c008000; @@ -37,6 +37,8 @@ /delete-node/ sdmmc2-b4-0; /delete-node/ sdmmc2-b4-1; /delete-node/ sdmmc2-d47-0; + /delete-node/ sdmmc2-d47-1; + /delete-node/ sdmmc2-d47-3; /delete-node/ usbotg_hs-0; /delete-node/ usbotg-fs-dp-dm-0; }; diff --git a/fdts/stm32mp15-pinctrl.dtsi b/fdts/stm32mp15-pinctrl.dtsi index 058cde264..e8e6b9f3f 100644 --- a/fdts/stm32mp15-pinctrl.dtsi +++ b/fdts/stm32mp15-pinctrl.dtsi @@ -86,12 +86,6 @@ }; }; - rtc_out2_rmp_pins_a: rtc-out2-rmp-pins-0 { - pins { - pinmux = ; /* RTC_OUT2_RMP */ - }; - }; - sdmmc1_b4_pins_a: sdmmc1-b4-0 { pins1 { pinmux = , /* SDMMC1_D0 */ @@ -176,6 +170,18 @@ }; }; + sdmmc2_d47_pins_b: sdmmc2-d47-1 { + pins { + pinmux = , /* SDMMC2_D4 */ + , /* SDMMC2_D5 */ + , /* SDMMC2_D6 */ + ; /* SDMMC2_D7 */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + }; + sdmmc2_d47_pins_d: sdmmc2-d47-3 { pins { pinmux = , /* SDMMC2_D4 */ @@ -213,33 +219,89 @@ uart7_pins_a: uart7-0 { pins1 { - pinmux = ; /* UART4_TX */ + pinmux = ; /* UART7_TX */ bias-disable; drive-push-pull; slew-rate = <0>; }; pins2 { - pinmux = , /* UART4_RX */ - , /* UART4_CTS */ - ; /* UART4_RTS */ + pinmux = , /* UART7_RX */ + , /* UART7_CTS */ + ; /* UART7_RTS */ bias-disable; }; }; uart7_pins_b: uart7-1 { pins1 { - pinmux = ; /* USART7_TX */ + pinmux = ; /* UART7_TX */ bias-disable; drive-push-pull; slew-rate = <0>; }; pins2 { - pinmux = ; /* USART7_RX */ + pinmux = ; /* UART7_RX */ + bias-disable; + }; + }; + + uart7_pins_c: uart7-2 { + pins1 { + pinmux = ; /* UART7_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; /* UART7_RX */ + bias-disable; + }; + }; + + uart8_pins_a: uart8-0 { + pins1 { + pinmux = ; /* UART8_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; /* UART8_RX */ bias-disable; }; }; usart2_pins_a: usart2-0 { + pins1 { + pinmux = , /* USART2_TX */ + ; /* USART2_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* USART2_RX */ + ; /* USART2_CTS_NSS */ + bias-disable; + }; + }; + + usart2_pins_b: usart2-1 { + pins1 { + pinmux = , /* USART2_TX */ + ; /* USART2_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* USART2_RX */ + ; /* USART2_CTS_NSS */ + bias-disable; + }; + }; + + usart2_pins_c: usart2-2 { pins1 { pinmux = , /* USART2_TX */ ; /* USART2_RTS */ @@ -256,20 +318,33 @@ usart3_pins_a: usart3-0 { pins1 { - pinmux = , /* USART3_TX */ - ; /* USART3_RTS */ + pinmux = ; /* USART3_TX */ bias-disable; drive-push-pull; slew-rate = <0>; }; pins2 { - pinmux = , /* USART3_RX */ - ; /* USART3_CTS_NSS */ + pinmux = ; /* USART3_RX */ bias-disable; }; }; usart3_pins_b: usart3-1 { + pins1 { + pinmux = , /* USART3_TX */ + ; /* USART3_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* USART3_RX */ + ; /* USART3_CTS_NSS */ + bias-disable; + }; + }; + + usart3_pins_c: usart3-2 { pins1 { pinmux = , /* USART3_TX */ ; /* USART3_RTS */ @@ -284,7 +359,7 @@ }; }; - usbotg_hs_pins_a: usbotg_hs-0 { + usbotg_hs_pins_a: usbotg-hs-0 { pins { pinmux = ; /* OTG_ID */ }; diff --git a/fdts/stm32mp151.dtsi b/fdts/stm32mp151.dtsi index c350c66de..a7c197121 100644 --- a/fdts/stm32mp151.dtsi +++ b/fdts/stm32mp151.dtsi @@ -174,7 +174,7 @@ }; usbotg_hs: usb-otg@49000000 { - compatible = "st,stm32mp1-hsotg", "snps,dwc2"; + compatible = "st,stm32mp15-hsotg", "snps,dwc2"; reg = <0x49000000 0x10000>; clocks = <&rcc USBO_K>; clock-names = "otg"; @@ -319,7 +319,7 @@ status = "disabled"; }; - sdmmc1: sdmmc@58005000 { + sdmmc1: mmc@58005000 { compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00253180>; reg = <0x58005000 0x1000>, <0x58006000 0x1000>; @@ -334,7 +334,7 @@ status = "disabled"; }; - sdmmc2: sdmmc@58007000 { + sdmmc2: mmc@58007000 { compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00253180>; reg = <0x58007000 0x1000>, <0x58008000 0x1000>; @@ -434,7 +434,7 @@ status = "disabled"; }; - bsec: nvmem@5c005000 { + bsec: efuse@5c005000 { compatible = "st,stm32mp15-bsec"; reg = <0x5c005000 0x400>; #address-cells = <1>; diff --git a/fdts/stm32mp157c-ed1.dts b/fdts/stm32mp157c-ed1.dts index a6b98b7d9..d47109678 100644 --- a/fdts/stm32mp157c-ed1.dts +++ b/fdts/stm32mp157c-ed1.dts @@ -20,7 +20,6 @@ stdout-path = "serial0:115200n8"; }; - memory@c0000000 { device_type = "memory"; reg = <0xC0000000 0x40000000>; @@ -52,7 +51,7 @@ }; &cryp1 { - status="okay"; + status = "okay"; }; &hash1 { diff --git a/fdts/stm32mp157c-ev1.dts b/fdts/stm32mp157c-ev1.dts index c5d12e3b2..4937514fb 100644 --- a/fdts/stm32mp157c-ev1.dts +++ b/fdts/stm32mp157c-ev1.dts @@ -57,6 +57,7 @@ &usart3 { pinctrl-names = "default"; - pinctrl-0 = <&usart3_pins_a>; + pinctrl-0 = <&usart3_pins_b>; + uart-has-rtscts; status = "disabled"; }; diff --git a/fdts/stm32mp157c-lxa-mc1.dts b/fdts/stm32mp157c-lxa-mc1.dts index 7b8e48127..31f138239 100644 --- a/fdts/stm32mp157c-lxa-mc1.dts +++ b/fdts/stm32mp157c-lxa-mc1.dts @@ -75,7 +75,7 @@ &sdmmc2 { pinctrl-names = "default"; - pinctrl-0 = <&sdmmc2_b4_pins_a &mc1_sdmmc2_d47_pins_b>; + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_b>; bus-width = <8>; no-1-8-v; no-sd; @@ -91,17 +91,3 @@ pinctrl-0 = <&uart4_pins_a>; status = "okay"; }; - -&pinctrl { - mc1_sdmmc2_d47_pins_b: mc1-sdmmc2-d47-1 { - pins { - pinmux = , /* SDMMC2_D4 */ - , /* SDMMC2_D5 */ - , /* SDMMC2_D6 */ - ; /* SDMMC2_D7 */ - slew-rate = <1>; - drive-push-pull; - bias-disable; - }; - }; -}; diff --git a/fdts/stm32mp15xx-dkx.dtsi b/fdts/stm32mp15xx-dkx.dtsi index 52b914b84..d6458a8a2 100644 --- a/fdts/stm32mp15xx-dkx.dtsi +++ b/fdts/stm32mp15xx-dkx.dtsi @@ -141,7 +141,6 @@ regulator-name = "vdd_usb"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - regulator-always-on; }; vdda: ldo5 { @@ -319,13 +318,13 @@ &uart7 { pinctrl-names = "default"; - pinctrl-0 = <&uart7_pins_b>; + pinctrl-0 = <&uart7_pins_c>; status = "disabled"; }; &usart3 { pinctrl-names = "default"; - pinctrl-0 = <&usart3_pins_b>; + pinctrl-0 = <&usart3_pins_c>; uart-has-rtscts; status = "disabled"; }; diff --git a/fdts/stm32mp15xxaa-pinctrl.dtsi b/fdts/stm32mp15xxaa-pinctrl.dtsi index 64e566bf8..04f7a43ad 100644 --- a/fdts/stm32mp15xxaa-pinctrl.dtsi +++ b/fdts/stm32mp15xxaa-pinctrl.dtsi @@ -1,7 +1,7 @@ // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2019 - All Rights Reserved - * Author: Alexandre Torgue + * Author: Alexandre Torgue for STMicroelectronics. */ &pinctrl { diff --git a/fdts/stm32mp15xxab-pinctrl.dtsi b/fdts/stm32mp15xxab-pinctrl.dtsi index d29af8986..328dad140 100644 --- a/fdts/stm32mp15xxab-pinctrl.dtsi +++ b/fdts/stm32mp15xxab-pinctrl.dtsi @@ -1,7 +1,7 @@ // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2019 - All Rights Reserved - * Author: Alexandre Torgue + * Author: Alexandre Torgue for STMicroelectronics. */ &pinctrl { diff --git a/fdts/stm32mp15xxac-pinctrl.dtsi b/fdts/stm32mp15xxac-pinctrl.dtsi index 5d8199fd1..7eaa245f4 100644 --- a/fdts/stm32mp15xxac-pinctrl.dtsi +++ b/fdts/stm32mp15xxac-pinctrl.dtsi @@ -1,7 +1,7 @@ // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2019 - All Rights Reserved - * Author: Alexandre Torgue + * Author: Alexandre Torgue for STMicroelectronics. */ &pinctrl { diff --git a/fdts/stm32mp15xxad-pinctrl.dtsi b/fdts/stm32mp15xxad-pinctrl.dtsi index 023f5404c..b63e207de 100644 --- a/fdts/stm32mp15xxad-pinctrl.dtsi +++ b/fdts/stm32mp15xxad-pinctrl.dtsi @@ -1,7 +1,7 @@ // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2019 - All Rights Reserved - * Author: Alexandre Torgue + * Author: Alexandre Torgue for STMicroelectronics. */ &pinctrl {