Tegra: memmap Tegra micro-seconds timer controller

This patch adds the Tegra micro-seconds controller to the
memory map. This allows us to use the delay_timer functionality.

Change-Id: Ia8b148a871949bfede539974cacbe0e93ec7e77c
Signed-off-by: Steven Kao <skao@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
This commit is contained in:
Steven Kao 2016-12-23 16:05:13 +08:00 committed by Varun Wadekar
parent d29d96fb3f
commit e99eeec6ff
5 changed files with 12 additions and 3 deletions

View File

@ -354,6 +354,12 @@ void bl31_plat_arch_setup(void)
MT_DEVICE | MT_RW | MT_SECURE);
#endif
/* map on-chip free running uS timer */
mmap_add_region(page_align((uint64_t)TEGRA_TMRUS_BASE, 0),
page_align((uint64_t)TEGRA_TMRUS_BASE, 0),
(uint64_t)TEGRA_TMRUS_SIZE,
MT_DEVICE | MT_RO | MT_SECURE);
/* add MMIO space */
plat_mmio_map = plat_get_mmio_map();
if (plat_mmio_map)

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -58,6 +58,7 @@
* Tegra micro-seconds timer constants
******************************************************************************/
#define TEGRA_TMRUS_BASE 0x60005010
#define TEGRA_TMRUS_SIZE 0x1000
/*******************************************************************************
* Tegra Clock and Reset Controller constants

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@ -237,6 +237,7 @@
* Tegra micro-seconds timer constants
******************************************************************************/
#define TEGRA_TMRUS_BASE 0x0C2E0000
#define TEGRA_TMRUS_SIZE 0x1000
/*******************************************************************************
* Tegra Power Mgmt Controller constants

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -83,6 +83,7 @@
* Tegra micro-seconds timer constants
******************************************************************************/
#define TEGRA_TMRUS_BASE 0x60005010
#define TEGRA_TMRUS_SIZE 0x1000
/*******************************************************************************
* Tegra Clock and Reset Controller constants

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@ -40,7 +40,7 @@ $(eval $(call add_define,PLATFORM_CLUSTER_COUNT))
PLATFORM_MAX_CPUS_PER_CLUSTER := 4
$(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER))
MAX_XLAT_TABLES := 3
MAX_XLAT_TABLES := 4
$(eval $(call add_define,MAX_XLAT_TABLES))
MAX_MMAP_REGIONS := 8