plat/arm: juno: Condition Juno entropy source with CRC instructions
The Juno Trusted Entropy Source has a bias, which makes the generated raw numbers fail a FIPS 140-2 statistic test. To improve the quality of the numbers, we can use the CPU's CRC instructions, which do a decent job on conditioning the bits. This adds a *very* simple version of arm_acle.h, which is typically provided by the compiler, and contains the CRC instrinsics definitions we need. We need the original version by using -nostdinc. Change-Id: I83d3e6902d6a1164aacd5060ac13a38f0057bd1a Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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@ -0,0 +1,22 @@
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/*
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* Copyright (c) 2021 ARM Limited
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* The definitions below are a subset of what we would normally get by using
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* the compiler's version of arm_acle.h. We can't use that directly because
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* we specify -nostdinc in the Makefiles.
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*
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* We just define the functions we need so far.
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*/
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#ifndef ARM_ACLE_H
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#define ARM_ACLE_H
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#if !defined(__aarch64__) || defined(__clang__)
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# define __crc32w __builtin_arm_crc32w
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#else
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# define __crc32w __builtin_aarch64_crc32w
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#endif
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#endif /* ARM_ACLE_H */
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@ -4,6 +4,7 @@
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arm_acle.h>
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#include <assert.h>
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#include <stdbool.h>
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#include <stdint.h>
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@ -35,6 +36,8 @@ static bool output_valid(void)
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return false; /* No output data available. */
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}
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static uint32_t crc_value = ~0U;
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/*
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* This function fills `buf` with 8 bytes of entropy.
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* It uses the Trusted Entropy Source peripheral on Juno.
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@ -69,14 +72,14 @@ bool juno_getentropy(uint64_t *buf)
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return false;
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}
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/* XOR each two 32-bit registers together, combine the pairs */
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ret = mmio_read_32(TRNG_BASE + 0);
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ret ^= mmio_read_32(TRNG_BASE + 4);
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ret <<= 32;
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/* CRC each two 32-bit registers together, combine the pairs */
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crc_value = __crc32w(crc_value, mmio_read_32(TRNG_BASE + 0));
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crc_value = __crc32w(crc_value, mmio_read_32(TRNG_BASE + 4));
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ret = (uint64_t)crc_value << 32;
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ret |= mmio_read_32(TRNG_BASE + 8);
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ret ^= mmio_read_32(TRNG_BASE + 12);
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*buf = ret;
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crc_value = __crc32w(crc_value, mmio_read_32(TRNG_BASE + 8));
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crc_value = __crc32w(crc_value, mmio_read_32(TRNG_BASE + 12));
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*buf = ret | crc_value;
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/* Acknowledge current cycle, clear output registers. */
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mmio_write_32(TRNG_BASE + TRNG_STATUS, 1);
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@ -164,6 +164,12 @@ ifeq (${ALLOW_RO_XLAT_TABLES}, 1)
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endif
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endif
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BL1_CPPFLAGS += -march=armv8-a+crc
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BL2_CPPFLAGS += -march=armv8-a+crc
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BL2U_CPPFLAGS += -march=armv8-a+crc
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BL31_CPPFLAGS += -march=armv8-a+crc
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BL32_CPPFLAGS += -march=armv8-a+crc
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# Add the FDT_SOURCES and options for Dynamic Config
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FDT_SOURCES += plat/arm/board/juno/fdts/${PLAT}_fw_config.dts \
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plat/arm/board/juno/fdts/${PLAT}_tb_fw_config.dts
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