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fix(drivers/rcar3): ddr: update DDR setting for H3, M3, M3N 

[IPL/DDR]
- Update H3, M3, M3N DDR setting rev.0.41.

Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: Idd2fbea621365d84b566748b5b7d7fb2f0d08168
This commit is contained in:
Chiaki Fujii 2020-10-30 10:45:18 +09:00 committed by Marek Vasut
parent b757d3a1d9
commit ec767c1b99
2 changed files with 9 additions and 3 deletions
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8
drivers/renesas/common/ddr/ddr_b/boot_init_dram.c
View File

@ -4147,7 +4147,13 @@ int32_t rcar_dram_init(void)
}
/* THCTR Bit6: PONM=0 , Bit0: THSST=0 */
data_l = mmio_read_32(THS1_THCTR) & 0xFFFFFFBE;
data_l = mmio_read_32(THS1_THCTR);
if (data_l & 0x00000040U) {
data_l = data_l & 0xFFFFFFBEU;
} else {
data_l = data_l | BIT(1);
}
mmio_write_32(THS1_THCTR, data_l);
/* Judge product and cut */

4
drivers/renesas/common/ddr/ddr_b/boot_init_dram_regdef.h
View File

@ -1,11 +1,11 @@
/*
* Copyright (c) 2015-2020, Renesas Electronics Corporation.
* Copyright (c) 2015-2021, Renesas Electronics Corporation.
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#define RCAR_DDR_VERSION "rev.0.40"
#define RCAR_DDR_VERSION "rev.0.41"
#define DRAM_CH_CNT 0x04
#define SLICE_CNT 0x04
#define CS_CNT 0x02