Merge pull request #78 from jeenuv:tf-issues-148
This commit is contained in:
Andrew Thoelke
commit
ec786cbca9
88
Makefile
88
Makefile
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@ -28,13 +28,26 @@
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# POSSIBILITY OF SUCH DAMAGE.
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#
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# Decrease the verbosity of the make script
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# can be made verbose by passing V=1 at the make command line
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ifdef V
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KBUILD_VERBOSE = ${V}
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else
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KBUILD_VERBOSE = 0
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endif
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#
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# Default values for build configurations
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#
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# Build verbosity
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V := 0
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# Debug build
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DEBUG := 0
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# Build architecture
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ARCH := aarch64
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# Build platform
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DEFAULT_PLAT := fvp
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PLAT := ${DEFAULT_PLAT}
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# SPD choice
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SPD := none
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# Base commit to perform code check on
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BASE_COMMIT := origin/master
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# NS timer register save and restore
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NS_TIMER_SWITCH := 0
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# Checkpatch ignores
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CHECK_IGNORE = --ignore COMPLEX_MACRO
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@ -42,17 +55,14 @@ CHECK_IGNORE = --ignore COMPLEX_MACRO
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CHECKPATCH_ARGS = --no-tree --no-signoff ${CHECK_IGNORE}
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CHECKCODE_ARGS = --no-patch --no-tree --no-signoff ${CHECK_IGNORE}
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ifeq "${KBUILD_VERBOSE}" "0"
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ifeq (${V},0)
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Q=@
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CHECKCODE_ARGS += --no-summary --terse
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else
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Q=
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endif
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export Q
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DEBUG ?= 0
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ifneq (${DEBUG}, 0)
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BUILD_TYPE := debug
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else
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@ -69,14 +79,6 @@ BL_COMMON_SOURCES := common/bl_common.c \
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lib/io_storage.c \
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plat/common/aarch64/platform_helpers.S
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ARCH ?= aarch64
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# By default, build fvp platform
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DEFAULT_PLAT := fvp
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PLAT ?= ${DEFAULT_PLAT}
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# By default, build no SPD component
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SPD ?= none
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BUILD_BASE := ./build
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BUILD_PLAT := ${BUILD_BASE}/${PLAT}/${BUILD_TYPE}
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@ -84,6 +86,19 @@ PLATFORMS := $(shell ls -I common plat/)
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SPDS := $(shell ls -I none services/spd)
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HELP_PLATFORMS := $(shell echo ${PLATFORMS} | sed 's/ /|/g')
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# Convenience function for adding build definitions
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# $(eval $(call add_define,FOO)) will have:
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# -DFOO if $(FOO) is empty; -DFOO=$(FOO) otherwise
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define add_define
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DEFINES += -D$(1)$(if $(value $(1)),=$(value $(1)),)
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endef
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# Convenience function for verifying option has a boolean value
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# $(eval $(call assert_boolean,FOO)) will assert FOO is 0 or 1
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define assert_boolean
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$(and $(patsubst 0,,$(value $(1))),$(patsubst 1,,$(value $(1))),$(error $(1) must be boolean))
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endef
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ifeq (${PLAT},)
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$(error "Error: Unknown platform. Please use PLAT=<platform name> to specify the platform.")
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endif
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@ -132,7 +147,6 @@ endif
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.PHONY: all msg_start clean realclean distclean cscope locate-checkpatch checkcodebase checkpatch fiptool fip
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.SUFFIXES:
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INCLUDES += -Iinclude/bl1 \
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-Iinclude/bl2 \
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-Iinclude/bl31 \
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@ -150,28 +164,32 @@ INCLUDES += -Iinclude/bl1 \
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${PLAT_INCLUDES} \
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${SPD_INCLUDES}
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# Process DEBUG flag
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$(eval $(call assert_boolean,DEBUG))
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$(eval $(call add_define,DEBUG))
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ifeq (${DEBUG},0)
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$(eval $(call add_define,NDEBUG))
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else
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CFLAGS += -g
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ASFLAGS += -g -Wa,--gdwarf-2
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endif
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# Process NS_TIMER_SWITCH flag
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$(eval $(call assert_boolean,NS_TIMER_SWITCH))
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$(eval $(call add_define,NS_TIMER_SWITCH))
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ASFLAGS += -nostdinc -ffreestanding -Wa,--fatal-warnings \
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-mgeneral-regs-only -D__ASSEMBLY__ ${INCLUDES} \
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-DDEBUG=${DEBUG}
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CFLAGS := -nostdinc -pedantic -ffreestanding -Wall \
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-mgeneral-regs-only -D__ASSEMBLY__ \
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${DEFINES} ${INCLUDES}
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CFLAGS += -nostdinc -pedantic -ffreestanding -Wall \
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-Werror -mgeneral-regs-only -std=c99 -c -Os \
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-DDEBUG=${DEBUG} ${INCLUDES} ${CFLAGS}
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${DEFINES} ${INCLUDES}
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CFLAGS += -ffunction-sections -fdata-sections
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LDFLAGS += --fatal-warnings -O1
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LDFLAGS += --gc-sections
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ifneq (${DEBUG}, 0)
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#CFLAGS += -g -O0
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CFLAGS += -g
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# -save-temps -fverbose-asm
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ASFLAGS += -g -Wa,--gdwarf-2
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else
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CFLAGS += -DNDEBUG=1
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endif
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CC := ${CROSS_COMPILE}gcc
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CPP := ${CROSS_COMPILE}cpp
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AS := ${CROSS_COMPILE}gcc
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@ -182,8 +200,6 @@ OD := ${CROSS_COMPILE}objdump
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NM := ${CROSS_COMPILE}nm
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PP := ${CROSS_COMPILE}gcc -E ${CFLAGS}
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BASE_COMMIT ?= origin/master
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# Variables for use with Firmware Image Package
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FIPTOOLPATH ?= tools/fip_create
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FIPTOOL ?= ${FIPTOOLPATH}/fip_create
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@ -172,6 +172,8 @@ func el1_sysregs_context_save
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mrs x9, vbar_el1
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stp x17, x9, [x0, #CTX_CONTEXTIDR_EL1]
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/* Save NS timer registers if the build has instructed so */
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#if NS_TIMER_SWITCH
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mrs x10, cntp_ctl_el0
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mrs x11, cntp_cval_el0
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stp x10, x11, [x0, #CTX_CNTP_CTL_EL0]
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@ -181,8 +183,11 @@ func el1_sysregs_context_save
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stp x12, x13, [x0, #CTX_CNTV_CTL_EL0]
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mrs x14, cntkctl_el1
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str x14, [x0, #CTX_CNTKCTL_EL1]
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#endif
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mrs x15, fpexc32_el2
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stp x14, x15, [x0, #CTX_CNTKCTL_EL1]
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str x15, [x0, #CTX_FP_FPEXC32_EL2]
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ret
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@ -253,6 +258,8 @@ func el1_sysregs_context_restore
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msr contextidr_el1, x17
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msr vbar_el1, x9
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/* Restore NS timer registers if the build has instructed so */
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#if NS_TIMER_SWITCH
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ldp x10, x11, [x0, #CTX_CNTP_CTL_EL0]
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msr cntp_ctl_el0, x10
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msr cntp_cval_el0, x11
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@ -261,8 +268,11 @@ func el1_sysregs_context_restore
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msr cntv_ctl_el0, x12
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msr cntv_cval_el0, x13
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ldp x14, x15, [x0, #CTX_CNTKCTL_EL1]
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ldr x14, [x0, #CTX_CNTKCTL_EL1]
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msr cntkctl_el1, x14
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#endif
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ldr x15, [x0, #CTX_FP_FPEXC32_EL2]
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msr fpexc32_el2, x15
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/* No explict ISB required here as ERET covers it */
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@ -83,6 +83,9 @@ To build the software for the FVPs, follow these steps:
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BL33=<path-to>/<bl33_image> \
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make PLAT=fvp all fip
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See the "Summary of build options" for information on available build
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options.
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By default this produces a release version of the build. To produce a debug
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version instead, refer to the "Debugging options" section below. UEFI can be
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used as the BL3-3 image, refer to the "Obtaining the normal world software"
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@ -120,6 +123,39 @@ To build the software for the FVPs, follow these steps:
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make realclean
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### Summary of build options
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ARM Trusted Firmware build system supports the following build options. Unless
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mentioned otherwise, these options are expected to be specified at the build
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command line and are not to be modified in any component makefiles. Note that
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the build system doesn't track dependency for build options. Therefore, if any
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of the build options are changed from a previous build, a clean build must be
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performed.
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* `BL33`: Path to BL33 image in the host file system. This is mandatory for
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`fip` target
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* `CROSS_COMPILE`: Prefix to tool chain binaries. Please refer to examples in
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this document for usage
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* `DEBUG`: Chooses between a debug and release build. It can take either 0
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(release) or 1 (debug) as values. 0 is the default
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* `NS_TIMER_SWITCH`: Enable save and restore for non-secure timer register
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contents upon world switch. It can take either 0 (don't save and restore) or
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1 (do save and restore). 0 is the default. An SPD could set this to 1 if it
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wants the timer registers to be saved and restored
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* `PLAT`: Choose a platform to build ARM Trusted Firmware for. The chosen
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platform name must be the name of one of the directories under the `plat/`
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directory other than `common`
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* `SPD`: Choose a Secure Payload Dispatcher component to be built into the
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Trusted Firmware. The value should be the path to the directory containing
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SPD source; the directory is expected to contain `spd.mk` makefile
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* `V`: Verbose build. If assigned anything other than 0, the build commands
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are printed. Default is 0
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### Creating a Firmware Image Package
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@ -127,6 +127,11 @@
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#define CTX_AFSR1_EL1 0xc8
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#define CTX_CONTEXTIDR_EL1 0xd0
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#define CTX_VBAR_EL1 0xd8
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/*
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* If the timer registers aren't saved and restored, we don't have to reserve
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* space for them in the context
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*/
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#if NS_TIMER_SWITCH
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#define CTX_CNTP_CTL_EL0 0xe0
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#define CTX_CNTP_CVAL_EL0 0xe8
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#define CTX_CNTV_CTL_EL0 0xf0
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@ -134,6 +139,10 @@
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#define CTX_CNTKCTL_EL1 0x100
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#define CTX_FP_FPEXC32_EL2 0x108
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#define CTX_SYSREGS_END 0x110
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#else
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#define CTX_FP_FPEXC32_EL2 0xe0
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#define CTX_SYSREGS_END 0xf0
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#endif
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/*******************************************************************************
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* Constants that allow assembler code to access members of and the 'fp_regs'
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