Use *_END instead of *_LIMIT for linker derived end addresses
The usage of _LIMIT seems odd here, so rename as follows: BL_CODE_LIMIT --> BL_CODE_END BL_RO_DATA_LIMIT --> BL_RO_DATA_END BL1_CODE_LIMIT --> BL1_CODE_END BL1_RO_DATA_LIMIT --> BL1_RO_DATA_END Basically, we want to use _LIMIT and _END properly as follows: *_SIZE + *_MAX_SIZE = *_LIMIT *_SIZE + *_SIZE = *_END The _LIMIT is generally defined by platform_def.h to indicate the platform-dependent memory constraint. So, its typical usage is ASSERT(. <= BL31_LIMIT, "BL31 image has exceeded its limit.") in a linker script. On the other hand, _END is used to indicate the end address of the compiled image, i.e. we do not know it until the image is linked. Here, all of these macros belong to the latter, so should be suffixed with _END. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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@ -119,22 +119,22 @@
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*/
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#if SEPARATE_CODE_AND_RODATA
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#define BL_CODE_BASE (unsigned long)(&__TEXT_START__)
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#define BL_CODE_LIMIT (unsigned long)(&__TEXT_END__)
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#define BL_CODE_END (unsigned long)(&__TEXT_END__)
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#define BL_RO_DATA_BASE (unsigned long)(&__RODATA_START__)
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#define BL_RO_DATA_LIMIT (unsigned long)(&__RODATA_END__)
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#define BL_RO_DATA_END (unsigned long)(&__RODATA_END__)
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#define BL1_CODE_LIMIT BL_CODE_LIMIT
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#define BL1_CODE_END BL_CODE_END
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#define BL1_RO_DATA_BASE (unsigned long)(&__RODATA_START__)
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#define BL1_RO_DATA_LIMIT round_up(BL1_ROM_END, PAGE_SIZE)
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#define BL1_RO_DATA_END round_up(BL1_ROM_END, PAGE_SIZE)
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#else
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#define BL_CODE_BASE (unsigned long)(&__RO_START__)
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#define BL_CODE_LIMIT (unsigned long)(&__RO_END__)
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#define BL_CODE_END (unsigned long)(&__RO_END__)
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#define BL_RO_DATA_BASE 0
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#define BL_RO_DATA_LIMIT 0
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#define BL_RO_DATA_END 0
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#define BL1_CODE_LIMIT round_up(BL1_ROM_END, PAGE_SIZE)
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#define BL1_CODE_END round_up(BL1_ROM_END, PAGE_SIZE)
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#define BL1_RO_DATA_BASE 0
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#define BL1_RO_DATA_LIMIT 0
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#define BL1_RO_DATA_END 0
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#endif /* SEPARATE_CODE_AND_RODATA */
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#endif /* __COMMON_DEF_H__ */
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@ -124,9 +124,9 @@ void arm_bl1_plat_arch_setup(void)
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arm_setup_page_tables(bl1_tzram_layout.total_base,
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bl1_tzram_layout.total_size,
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BL_CODE_BASE,
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BL1_CODE_LIMIT,
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BL1_CODE_END,
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BL1_RO_DATA_BASE,
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BL1_RO_DATA_LIMIT
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BL1_RO_DATA_END
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#if USE_COHERENT_MEM
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, BL1_COHERENT_RAM_BASE,
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BL1_COHERENT_RAM_LIMIT
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@ -238,9 +238,9 @@ void arm_bl2_plat_arch_setup(void)
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arm_setup_page_tables(bl2_tzram_layout.total_base,
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bl2_tzram_layout.total_size,
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BL_CODE_BASE,
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BL_CODE_LIMIT,
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BL_CODE_END,
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BL_RO_DATA_BASE,
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BL_RO_DATA_LIMIT
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BL_RO_DATA_END
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#if USE_COHERENT_MEM
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, BL2_COHERENT_RAM_BASE,
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BL2_COHERENT_RAM_LIMIT
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@ -95,9 +95,9 @@ void arm_bl2u_plat_arch_setup(void)
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arm_setup_page_tables(BL2U_BASE,
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BL31_LIMIT,
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BL_CODE_BASE,
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BL_CODE_LIMIT,
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BL_CODE_END,
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BL_RO_DATA_BASE,
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BL_RO_DATA_LIMIT
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BL_RO_DATA_END
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#if USE_COHERENT_MEM
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,
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BL2U_COHERENT_RAM_BASE,
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@ -288,9 +288,9 @@ void arm_bl31_plat_arch_setup(void)
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arm_setup_page_tables(BL31_BASE,
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BL31_END - BL31_BASE,
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BL_CODE_BASE,
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BL_CODE_LIMIT,
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BL_CODE_END,
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BL_RO_DATA_BASE,
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BL_RO_DATA_LIMIT
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BL_RO_DATA_END
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#if USE_COHERENT_MEM
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, BL31_COHERENT_RAM_BASE,
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BL31_COHERENT_RAM_LIMIT
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@ -202,9 +202,9 @@ void sp_min_plat_arch_setup(void)
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arm_setup_page_tables(BL32_BASE,
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(BL32_END - BL32_BASE),
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BL_CODE_BASE,
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BL_CODE_LIMIT,
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BL_CODE_END,
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BL_RO_DATA_BASE,
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BL_RO_DATA_LIMIT
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BL_RO_DATA_END
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#if USE_COHERENT_MEM
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, BL32_COHERENT_RAM_BASE,
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BL32_COHERENT_RAM_LIMIT
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@ -91,9 +91,9 @@ void tsp_plat_arch_setup(void)
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arm_setup_page_tables(BL32_BASE,
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(BL32_END - BL32_BASE),
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BL_CODE_BASE,
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BL_CODE_LIMIT,
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BL_CODE_END,
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BL_RO_DATA_BASE,
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BL_RO_DATA_LIMIT
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BL_RO_DATA_END
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#if USE_COHERENT_MEM
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, BL32_COHERENT_RAM_BASE,
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BL32_COHERENT_RAM_LIMIT
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@ -160,9 +160,9 @@ void bl31_plat_arch_setup(void)
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arm_setup_page_tables(BL31_BASE,
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BL31_END - BL31_BASE,
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BL_CODE_BASE,
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BL_CODE_LIMIT,
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BL_CODE_END,
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BL_RO_DATA_BASE,
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BL_RO_DATA_LIMIT,
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BL_RO_DATA_END,
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BL31_COHERENT_RAM_BASE,
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BL31_COHERENT_RAM_LIMIT);
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enable_mmu_el3(0);
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@ -81,9 +81,9 @@ void tsp_plat_arch_setup(void)
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arm_setup_page_tables(BL32_BASE,
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BL32_END - BL32_BASE,
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BL_CODE_BASE,
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BL_CODE_LIMIT,
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BL_CODE_END,
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BL_RO_DATA_BASE,
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BL_RO_DATA_LIMIT,
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BL_RO_DATA_END,
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BL32_COHERENT_RAM_BASE,
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BL32_COHERENT_RAM_LIMIT
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);
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