Merge "fix(pie): invalidate data cache in the entire image range if PIE is enabled" into integration
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commit
ed6f89e95b
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@ -100,11 +100,27 @@ func tsp_entrypoint _align=3
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* sections. This is done to safeguard against
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* sections. This is done to safeguard against
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* possible corruption of this memory by dirty
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* possible corruption of this memory by dirty
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* cache lines in a system cache as a result of
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* cache lines in a system cache as a result of
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* use by an earlier boot loader stage.
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* use by an earlier boot loader stage. If PIE
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* is enabled however, RO sections including the
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* GOT may be modified during pie fixup.
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* Therefore, to be on the safe side, invalidate
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* the entire image region if PIE is enabled.
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* ---------------------------------------------
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* ---------------------------------------------
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*/
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*/
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adr x0, __RW_START__
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#if ENABLE_PIE
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adr x1, __RW_END__
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#if SEPARATE_CODE_AND_RODATA
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adrp x0, __TEXT_START__
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add x0, x0, :lo12:__TEXT_START__
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#else
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adrp x0, __RO_START__
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add x0, x0, :lo12:__RO_START__
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#endif /* SEPARATE_CODE_AND_RODATA */
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#else
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adrp x0, __RW_START__
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add x0, x0, :lo12:__RW_START__
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#endif /* ENABLE_PIE */
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adrp x1, __RW_END__
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add x1, x1, :lo12:__RW_END__
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sub x1, x1, x0
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sub x1, x1, x0
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bl inv_dcache_range
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bl inv_dcache_range
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@ -380,10 +380,21 @@
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* includes the data and NOBITS sections. This is done to
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* includes the data and NOBITS sections. This is done to
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* safeguard against possible corruption of this memory by
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* safeguard against possible corruption of this memory by
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* dirty cache lines in a system cache as a result of use by
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* dirty cache lines in a system cache as a result of use by
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* an earlier boot loader stage.
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* an earlier boot loader stage. If PIE is enabled however,
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* RO sections including the GOT may be modified during
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* pie fixup. Therefore, to be on the safe side, invalidate
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* the entire image region if PIE is enabled.
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* -----------------------------------------------------------------
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* -----------------------------------------------------------------
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*/
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*/
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#if ENABLE_PIE
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#if SEPARATE_CODE_AND_RODATA
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ldr r0, =__TEXT_START__
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#else
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ldr r0, =__RO_START__
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#endif /* SEPARATE_CODE_AND_RODATA */
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#else
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ldr r0, =__RW_START__
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ldr r0, =__RW_START__
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#endif /* ENABLE_PIE */
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ldr r1, =__RW_END__
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ldr r1, =__RW_END__
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sub r1, r1, r0
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sub r1, r1, r0
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bl inv_dcache_range
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bl inv_dcache_range
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@ -430,11 +430,24 @@
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* includes the data and NOBITS sections. This is done to
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* includes the data and NOBITS sections. This is done to
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* safeguard against possible corruption of this memory by
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* safeguard against possible corruption of this memory by
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* dirty cache lines in a system cache as a result of use by
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* dirty cache lines in a system cache as a result of use by
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* an earlier boot loader stage.
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* an earlier boot loader stage. If PIE is enabled however,
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* RO sections including the GOT may be modified during
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* pie fixup. Therefore, to be on the safe side, invalidate
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* the entire image region if PIE is enabled.
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* -------------------------------------------------------------
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* -------------------------------------------------------------
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*/
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*/
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#if ENABLE_PIE
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#if SEPARATE_CODE_AND_RODATA
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adrp x0, __TEXT_START__
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add x0, x0, :lo12:__TEXT_START__
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#else
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adrp x0, __RO_START__
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add x0, x0, :lo12:__RO_START__
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#endif /* SEPARATE_CODE_AND_RODATA */
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#else
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adrp x0, __RW_START__
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adrp x0, __RW_START__
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add x0, x0, :lo12:__RW_START__
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add x0, x0, :lo12:__RW_START__
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#endif /* ENABLE_PIE */
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adrp x1, __RW_END__
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adrp x1, __RW_END__
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add x1, x1, :lo12:__RW_END__
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add x1, x1, :lo12:__RW_END__
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sub x1, x1, x0
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sub x1, x1, x0
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