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Merge pull request #1379 from CJKay/nsram-fix 

Fix incorrect NSRAM memory map region for SGI-575
This commit is contained in:
Dimitris Papastamos 2018-05-15 18:40:03 +01:00 committed by GitHub
parent e1040aac74 d0223211e8
commit ede13422f7
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 7 additions and 4 deletions
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5
include/plat/arm/css/common/css_def.h
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@ -22,9 +22,6 @@
#define CSS_DEVICE_BASE 0x20000000
#define CSS_DEVICE_SIZE 0x0e000000
#define NSRAM_BASE 0x2e000000
#define NSRAM_SIZE 0x00008000
/* System Security Control Registers */
#define SSC_REG_BASE 0x2a420000
#define SSC_GPRETN (SSC_REG_BASE + 0x030)
@ -102,7 +99,7 @@
#define CSS_MAP_NSRAM MAP_REGION_FLAT( \
NSRAM_BASE, \
NSRAM_SIZE, \
MT_DEVICE | MT_RW | MT_SECURE)
MT_DEVICE | MT_RW | MT_NS)
/* Platform ID address */
#define SSC_VERSION_OFFSET 0x040

3
plat/arm/board/juno/include/platform_def.h
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@ -56,6 +56,9 @@
/* Use the bypass address */
#define PLAT_ARM_TRUSTED_ROM_BASE V2M_FLASH0_BASE + BL1_ROM_BYPASS_OFFSET
#define NSRAM_BASE 0x2e000000
#define NSRAM_SIZE 0x00008000 /* 32KB */
/* virtual address used by dynamic mem_protect for chunk_base */
#define PLAT_ARM_MEM_PROTEC_VA_FRAME 0xc0000000

3
plat/arm/css/sgi/include/platform_def.h
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@ -52,6 +52,9 @@
#define PLAT_ARM_TRUSTED_ROM_BASE 0x0
#define PLAT_ARM_TRUSTED_ROM_SIZE 0x00080000 /* 512KB */
#define PLAT_ARM_NSRAM_BASE 0x06000000
#define PLAT_ARM_NSRAM_SIZE 0x00080000 /* 512KB */
#define PLAT_MAX_PWR_LVL 1
#define PLAT_ARM_G1S_IRQS ARM_G1S_IRQS, \