Merge "uniphier: support console based on multi-console" into integration
This commit is contained in:
Sandrine Bailleux
TrustedFirmware Code Review
commit
ef4b8d5a80
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@ -1,5 +1,5 @@
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#
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# Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
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# Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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@ -27,8 +27,9 @@ PLAT_PATH := plat/socionext/uniphier
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PLAT_INCLUDES := -I$(PLAT_PATH)/include
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# common sources for BL2, BL31 (and BL32 if SPD=tspd)
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PLAT_BL_COMMON_SOURCES += drivers/console/aarch64/console.S \
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PLAT_BL_COMMON_SOURCES += plat/common/aarch64/crash_console_helpers.S \
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$(PLAT_PATH)/uniphier_console.S \
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$(PLAT_PATH)/uniphier_console_setup.c \
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$(PLAT_PATH)/uniphier_helpers.S \
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$(PLAT_PATH)/uniphier_soc_info.c \
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$(PLAT_PATH)/uniphier_xlat_setup.c \
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -84,11 +84,3 @@ void bl31_plat_arch_setup(void)
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uniphier_mmap_setup(BL31_BASE, BL31_SIZE, NULL);
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enable_mmu_el3(0);
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}
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void bl31_plat_runtime_setup(void)
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{
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/* Suppress any runtime logs unless DEBUG is defined */
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#if !DEBUG
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console_uninit();
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#endif
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}
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@ -1,81 +1,23 @@
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/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <asm_macros.S>
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#include <drivers/console.h>
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#define UNIPHIER_UART_BASE 0x54006800
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#define UNIPHIER_UART_END 0x54006c00
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#define UNIPHIER_UART_OFFSET 0x100
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#define UNIPHIER_UART_RX 0x00 /* In: Receive buffer */
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#define UNIPHIER_UART_TX 0x00 /* Out: Transmit buffer */
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#define UNIPHIER_UART_FCR 0x0c /* Char/FIFO Control Register */
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#define UNIPHIER_UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */
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#define UNIPHIER_UART_LCR_MCR 0x10 /* Line/Modem Control Register */
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#define UNIPHIER_UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */
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#define UNIPHIER_UART_LSR 0x14 /* Line Status Register */
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#define UNIPHIER_UART_LSR_TEMT_BIT 6 /* Transmitter empty */
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#define UNIPHIER_UART_LSR_THRE_BIT 5 /* Transmit-hold-register empty */
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#define UNIPHIER_UART_LSR_DR_BIT 0 /* Receiver data ready */
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#define UNIPHIER_UART_DLR 0x24 /* Divisor Latch Register */
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/*
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* Uncomment for debug
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*/
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/* #define UNIPHIER_UART_INIT_DIVISOR */
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#define UNIPHIER_UART_DEFAULT_BASE (UNIPHIER_UART_BASE)
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#define UNIPHIER_UART_CLK_RATE 58820000
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#define UNIPHIER_UART_DEFAULT_BAUDRATE 115200
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/*
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* In: x0 - console base address
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* w1 - uart clock in Hz
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* w2 - baud rate
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* Out: return 1 on success, or 0 on error
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*/
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.globl console_core_init
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func console_core_init
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cbz x0, 1f
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#ifdef UNIPHIER_UART_INIT_DIVISOR
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cbz w1, 1f
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cbz w2, 1f
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/* divisor = uart_clock / (16 * baud_rate) */
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udiv w2, w1, w2
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lsr w2, w2, #4
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#endif
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/* Make sure the transmitter is empty before the divisor set/change */
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0: ldr w1, [x0, #UNIPHIER_UART_LSR]
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tbz w1, #UNIPHIER_UART_LSR_TEMT_BIT, 0b
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#ifdef UNIPHIER_UART_INIT_DIVISOR
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str w2, [x0, #UNIPHIER_UART_DLR]
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#endif
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mov w2, #UNIPHIER_UART_FCR_ENABLE_FIFO
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str w2, [x0, #UNIPHIER_UART_FCR]
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mov w2, #(UNIPHIER_UART_LCR_WLEN8 << 8)
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str w2, [x0, #UNIPHIER_UART_LCR_MCR]
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mov w0, #1
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ret
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1: mov w0, #0
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ret
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endfunc console_core_init
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#include "uniphier_console.h"
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/*
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* In: w0 - character to be printed
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* x1 - console base address
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* Out: return the character written, or -1 on error
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* x1 - pointer to console structure
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* Out: return the character written (always succeeds)
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* Clobber: x2
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*/
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.globl console_core_putc
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func console_core_putc
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/* Error out if the console is not initialized */
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cbz x1, 2f
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.globl uniphier_console_putc
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func uniphier_console_putc
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ldr x1, [x1, #CONSOLE_T_DRVDATA]
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/* Wait until the transmitter FIFO gets empty */
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0: ldr w2, [x1, #UNIPHIER_UART_LSR]
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@ -86,43 +28,40 @@ func console_core_putc
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1: str w2, [x1, #UNIPHIER_UART_TX]
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cmp w2, #'\n'
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b.ne 3f
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b.ne 2f
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mov w2, #'\r' /* Append '\r' to '\n' */
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b 1b
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2: mov w0, #-1
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3: ret
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endfunc console_core_putc
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2: ret
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endfunc uniphier_console_putc
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/*
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* In: x0 - console base address
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* Out: return the character read
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* In: x0 - pointer to console structure
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* Out: return the character read, or ERROR_NO_PENDING_CHAR if no character
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is available
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* Clobber: x1
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*/
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.globl console_core_getc
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func console_core_getc
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/* Error out if the console is not initialized */
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cbz x0, 1f
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.globl uniphier_console_getc
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func uniphier_console_getc
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ldr x0, [x0, #CONSOLE_T_DRVDATA]
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/* Wait while the receiver FIFO is empty */
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0: ldr w1, [x0, #UNIPHIER_UART_LSR]
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tbz w1, #UNIPHIER_UART_LSR_DR_BIT, 0b
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ldr w1, [x0, #UNIPHIER_UART_LSR]
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tbz w1, #UNIPHIER_UART_LSR_DR_BIT, 0f
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ldr w0, [x0, #UNIPHIER_UART_RX]
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ret
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0: mov w0, #ERROR_NO_PENDING_CHAR
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ret
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1: mov w0, #-1
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ret
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endfunc console_core_getc
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endfunc uniphier_console_getc
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/*
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* In: x0 - console base address
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* Out: return 0, or -1 on error
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* In: x0 - pointer to console structure
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* Out: return 0 (always succeeds)
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* Clobber: x1
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*/
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.global console_core_flush
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func console_core_flush
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/* Error out if the console is not initialized */
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cbz x0, 1f
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.global uniphier_console_flush
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func uniphier_console_flush
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ldr x0, [x0, #CONSOLE_T_DRVDATA]
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/* wait until the transmitter gets empty */
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0: ldr w1, [x0, #UNIPHIER_UART_LSR]
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@ -130,83 +69,4 @@ func console_core_flush
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mov w0, #0
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ret
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1: mov w0, #-1
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ret
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endfunc console_core_flush
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/* find initialized UART port */
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.macro uniphier_console_get_base base, tmpx, tmpw
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ldr \base, =UNIPHIER_UART_BASE
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0000: ldr \tmpw, [\base, #UNIPHIER_UART_DLR]
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mvn \tmpw, \tmpw
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uxth \tmpw, \tmpw
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cbnz \tmpw, 0001f
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add \base, \base, #UNIPHIER_UART_OFFSET
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ldr \tmpx, =UNIPHIER_UART_END
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cmp \base, \tmpx
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b.lo 0000b
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mov \base, #0
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0001:
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.endm
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/*
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* int plat_crash_console_init(void)
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* Clobber: x0-x2
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*/
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.globl plat_crash_console_init
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func plat_crash_console_init
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#ifdef UNIPHIER_UART_INIT_DIVISOR
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ldr x0, =UNIPHIER_UART_DEFAULT_BASE
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ldr x1, =UNIPHIER_UART_CLK_RATE
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ldr x2, =UNIPHIER_UART_DEFAULT_BAUDRATE
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b console_core_init
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#else
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ret
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#endif
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endfunc plat_crash_console_init
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/*
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* int plat_crash_console_putc(int c)
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* Clobber: x1, x2
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*/
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.globl plat_crash_console_putc
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func plat_crash_console_putc
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#ifdef UNIPHIER_UART_INIT_DIVISOR
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ldr x1, =UNIPHIER_UART_DEFAULT_BASE
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#else
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uniphier_console_get_base x1, x2, w2
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#endif
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b console_core_putc
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endfunc plat_crash_console_putc
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/*
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* int plat_crash_console_flush(void)
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* Clobber: x0, x1
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*/
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.global plat_crash_console_flush
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func plat_crash_console_flush
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#ifdef UNIPHIER_UART_INIT_DIVISOR
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ldr x0, =UNIPHIER_UART_DEFAULT_BASE
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#else
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uniphier_console_get_base x0, x1, w1
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#endif
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b console_core_flush
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endfunc plat_crash_console_flush
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/*
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* void uniphier_console_setup(void)
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* Clobber: x0-x2
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*/
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.globl uniphier_console_setup
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func uniphier_console_setup
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#ifdef UNIPHIER_UART_INIT_DIVISOR
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ldr x0, =UNIPHIER_UART_DEFAULT_BASE
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ldr w1, =UNIPHIER_UART_CLK_RATE
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ldr w2, =UNIPHIER_UART_DEFAULT_BAUDRATE
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#else
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uniphier_console_get_base x0, x1, w1
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mov w1, #0
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mov w2, #0
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#endif
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b console_init
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endfunc uniphier_console_setup
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endfunc uniphier_console_flush
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@ -0,0 +1,25 @@
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/*
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* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef UNIPHIER_CONSOLE_H
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#define UNIPHIER_CONSOLE_H
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#define UNIPHIER_UART_RX 0x00 /* In: Receive buffer */
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#define UNIPHIER_UART_TX 0x00 /* Out: Transmit buffer */
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#define UNIPHIER_UART_FCR 0x0c /* Char/FIFO Control Register */
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#define UNIPHIER_UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */
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#define UNIPHIER_UART_LCR_MCR 0x10 /* Line/Modem Control Register */
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#define UNIPHIER_UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */
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#define UNIPHIER_UART_LSR 0x14 /* Line Status Register */
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#define UNIPHIER_UART_LSR_TEMT 0x40 /* Transmitter empty */
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#define UNIPHIER_UART_LSR_TEMT_BIT 6 /* Transmitter empty */
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#define UNIPHIER_UART_LSR_THRE_BIT 5 /* Transmit-hold-register empty */
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#define UNIPHIER_UART_LSR_DR_BIT 0 /* Receiver data ready */
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#define UNIPHIER_UART_DLR 0x24 /* Divisor Latch Register */
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#endif /* UNIPHIER_CONSOLE_H */
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@ -0,0 +1,87 @@
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/*
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* Copyright (c) 2019, Socionext Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <drivers/console.h>
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#include <errno.h>
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#include <lib/mmio.h>
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#include <plat/common/platform.h>
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#include "uniphier.h"
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#include "uniphier_console.h"
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#define UNIPHIER_UART_BASE 0x54006800
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#define UNIPHIER_UART_END 0x54006c00
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#define UNIPHIER_UART_OFFSET 0x100
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struct uniphier_console {
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struct console console;
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uintptr_t base;
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};
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/* These callbacks are implemented in assembly to use crash_console_helpers.S */
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int uniphier_console_putc(int character, struct console *console);
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int uniphier_console_getc(struct console *console);
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int uniphier_console_flush(struct console *console);
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static struct uniphier_console uniphier_console = {
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.console = {
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.flags = CONSOLE_FLAG_BOOT |
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#if DEBUG
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CONSOLE_FLAG_RUNTIME |
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#endif
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CONSOLE_FLAG_CRASH,
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.putc = uniphier_console_putc,
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.getc = uniphier_console_getc,
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.flush = uniphier_console_flush,
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},
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};
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/*
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* There are 4 UART ports available on this platform. By default, we want to
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* use the same one as used in the previous firmware stage.
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*/
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static uintptr_t uniphier_console_get_base(void)
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{
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uintptr_t base = UNIPHIER_UART_BASE;
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uint32_t div;
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while (base < UNIPHIER_UART_END) {
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div = mmio_read_32(base + UNIPHIER_UART_DLR);
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if (div)
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return base;
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base += UNIPHIER_UART_OFFSET;
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}
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return 0;
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}
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static void uniphier_console_init(uintptr_t base)
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{
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mmio_write_32(base + UNIPHIER_UART_FCR, UNIPHIER_UART_FCR_ENABLE_FIFO);
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mmio_write_32(base + UNIPHIER_UART_LCR_MCR,
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UNIPHIER_UART_LCR_WLEN8 << 8);
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}
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void uniphier_console_setup(void)
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{
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uintptr_t base;
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base = uniphier_console_get_base();
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if (!base)
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plat_error_handler(-EINVAL);
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uniphier_console.base = base;
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console_register(&uniphier_console.console);
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/*
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* The hardware might be still printing characters queued up in the
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* previous firmware stage. Make sure the transmitter is empty before
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* any initialization. Otherwise, the console might get corrupted.
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*/
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console_flush();
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uniphier_console_init(base);
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}
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