From ef7fb9e48e6425be1efa569e951812902e2c843e Mon Sep 17 00:00:00 2001 From: Sandrine Bailleux Date: Wed, 2 Dec 2015 10:19:06 +0000 Subject: [PATCH] Porting Guide: Clarify identity-mapping requirement The memory translation library in Trusted Firmware supports non-identity mappings for Physical to Virtual addresses since commit f984ce84ba. However, the porting guide hasn't been updated accordingly and still mandates the platform ports to use identity-mapped page tables for all addresses. This patch removes this out-dated information from the Porting Guide and clarifies in which circumstances non-identity mapping may safely be used. Fixes ARM-software/tf-issues#258 Change-Id: I84dab9f3cabfc43794951b1828bfecb13049f706 --- docs/porting-guide.md | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/docs/porting-guide.md b/docs/porting-guide.md index bdbdbc22e..557770e80 100644 --- a/docs/porting-guide.md +++ b/docs/porting-guide.md @@ -72,10 +72,20 @@ either mandatory or optional. 2.1 Common mandatory modifications ---------------------------------- -A platform port must enable the Memory Management Unit (MMU) with identity -mapped page tables, and enable both the instruction and data caches for each BL -stage. In ARM standard platforms, each BL stage configures the MMU in -the platform-specific architecture setup function, `blX_plat_arch_setup()`. + +A platform port must enable the Memory Management Unit (MMU) as well as the +instruction and data caches for each BL stage. Setting up the translation +tables is the responsibility of the platform port because memory maps differ +across platforms. A memory translation library (see `lib/aarch64/xlat_helpers.c` +and `lib/aarch64/xlat_tables.c`) is provided to help in this setup. Note that +although this library supports non-identity mappings, this is intended only for +re-mapping peripheral physical addresses and allows platforms with high I/O +addresses to reduce their virtual address space. All other addresses +corresponding to code and data must currently use an identity mapping. + +In ARM standard platforms, each BL stage configures the MMU in the +platform-specific architecture setup function, `blX_plat_arch_setup()`, and uses +an identity mapping for all addresses. If the build option `USE_COHERENT_MEM` is enabled, each platform can allocate a block of identity mapped secure memory with Device-nGnRE attributes aligned to