From f0143004e548582760aacd6f15f5499b18081a69 Mon Sep 17 00:00:00 2001 From: Marc Bonnici Date: Wed, 15 Dec 2021 18:00:50 +0000 Subject: [PATCH] feat(spmc): enable the SPMC to pass the linear core ID in a register Add TF-A implementation defined behaviour to provide the linear core ID in the x4 register when bringing up an SP. Signed-off-by: Marc Bonnici Change-Id: I6cb215841097b264d252ec0262b0b7272be99d41 --- services/std_svc/spm/el3_spmc/spmc_setup.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/services/std_svc/spm/el3_spmc/spmc_setup.c b/services/std_svc/spm/el3_spmc/spmc_setup.c index 7b23c9e3b..af5219d02 100644 --- a/services/std_svc/spm/el3_spmc/spmc_setup.c +++ b/services/std_svc/spm/el3_spmc/spmc_setup.c @@ -43,6 +43,12 @@ void spmc_el1_sp_setup(struct secure_partition_desc *sp, ep_info->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); + /* + * TF-A Implementation defined behaviour to provide the linear + * core ID in the x4 register. + */ + ep_info->args.arg4 = (uintptr_t) plat_my_core_pos(); + /* * Check whether setup is being performed for the primary or a secondary * execution context. In the latter case, indicate to the SP that this