plat: renesas: rcar: include: Code cleanup
This patch fixes checkpatch warnings and replaces TAB with space after #define macros. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I11f65d494997cbf612376fb120c27ef0166cdd3a
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
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* Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -97,11 +97,13 @@
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#define MAX_IO_DEVICES U(3)
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#define MAX_IO_DEVICES U(3)
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#define MAX_IO_HANDLES U(4)
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#define MAX_IO_HANDLES U(4)
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/*******************************************************************************
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/*
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******************************************************************************
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* BL2 specific defines.
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* BL2 specific defines.
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******************************************************************************/
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******************************************************************************
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/* Put BL2 just below BL3-1. BL2_BASE is calculated using the current BL2 debug
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* Put BL2 just below BL3-1. BL2_BASE is calculated using the current BL2 debug
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* size plus a little space for growth. */
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* size plus a little space for growth.
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*/
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#define RCAR_SYSRAM_BASE U(0xE6300000)
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#define RCAR_SYSRAM_BASE U(0xE6300000)
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#if (RCAR_LSI == RCAR_E3) || (RCAR_LSI == RCAR_D3)
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#if (RCAR_LSI == RCAR_E3) || (RCAR_LSI == RCAR_D3)
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#define BL2_LIMIT U(0xE6320000)
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#define BL2_LIMIT U(0xE6320000)
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@ -121,11 +123,13 @@
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#endif
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#endif
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#define RCAR_SYSRAM_SIZE (BL2_BASE - RCAR_SYSRAM_BASE)
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#define RCAR_SYSRAM_SIZE (BL2_BASE - RCAR_SYSRAM_BASE)
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/*******************************************************************************
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/*
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******************************************************************************
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* BL31 specific defines.
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* BL31 specific defines.
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******************************************************************************/
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******************************************************************************
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/* Put BL3-1 at the top of the Trusted SRAM. BL31_BASE is calculated using the
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* Put BL3-1 at the top of the Trusted SRAM. BL31_BASE is calculated using the
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* current BL3-1 debug size plus a little space for growth. */
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* current BL3-1 debug size plus a little space for growth.
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*/
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#define BL31_BASE (RCAR_TRUSTED_SRAM_BASE)
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#define BL31_BASE (RCAR_TRUSTED_SRAM_BASE)
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#define BL31_LIMIT (RCAR_TRUSTED_SRAM_BASE + \
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#define BL31_LIMIT (RCAR_TRUSTED_SRAM_BASE + \
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RCAR_TRUSTED_SRAM_SIZE)
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RCAR_TRUSTED_SRAM_SIZE)
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@ -176,7 +180,7 @@
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* Declarations and constants to access the mailboxes safely. Each mailbox is
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* Declarations and constants to access the mailboxes safely. Each mailbox is
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* aligned on the biggest cache line size in the platform. This is known only
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* aligned on the biggest cache line size in the platform. This is known only
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* to the platform as it might have a combination of integrated and external
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* to the platform as it might have a combination of integrated and external
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* caches. Such alignment ensures that two maiboxes do not sit on the same cache
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* caches. Such alignment ensures that two mailboxes do not sit on the same cache
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* line at any cache level. They could belong to different cpus/clusters &
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* line at any cache level. They could belong to different cpus/clusters &
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* get written while being protected by different locks causing corruption of
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* get written while being protected by different locks causing corruption of
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* a valid mailbox address.
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* a valid mailbox address.
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/*
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/*
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* Copyright (c) 2015-2019, Renesas Electronics Corporation. All rights reserved.
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* Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -47,15 +47,19 @@
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#define PARAMS_BASE (MBOX_BASE + MBOX_SIZE)
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#define PARAMS_BASE (MBOX_BASE + MBOX_SIZE)
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#define BOOT_KIND_BASE (RCAR_SHARED_MEM_BASE + \
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#define BOOT_KIND_BASE (RCAR_SHARED_MEM_BASE + \
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RCAR_SHARED_MEM_SIZE - 0x100)
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RCAR_SHARED_MEM_SIZE - 0x100)
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/* The number of regions like RO(code), coherent and data required by
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/*
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* different BL stages which need to be mapped in the MMU */
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* The number of regions like RO(code), coherent and data required by
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* different BL stages which need to be mapped in the MMU
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*/
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#if USE_COHERENT_MEM
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#if USE_COHERENT_MEM
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#define RCAR_BL_REGIONS (3)
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#define RCAR_BL_REGIONS (3)
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#else
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#else
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#define RCAR_BL_REGIONS (2)
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#define RCAR_BL_REGIONS (2)
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#endif
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#endif
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/* The RCAR_MAX_MMAP_REGIONS depend on the number of entries in rcar_mmap[]
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/*
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* defined for each BL stage in rcar_common.c. */
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* The RCAR_MAX_MMAP_REGIONS depends on the number of entries in rcar_mmap[]
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* defined for each BL stage in rcar_common.c.
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*/
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#if IMAGE_BL2
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#if IMAGE_BL2
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#define RCAR_MMAP_ENTRIES (9)
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#define RCAR_MMAP_ENTRIES (9)
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#endif
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#endif
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@ -75,7 +79,7 @@
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/* BL31 */
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/* BL31 */
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#define RCAR_DEVICE_BASE DEVICE_RCAR_BASE
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#define RCAR_DEVICE_BASE DEVICE_RCAR_BASE
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#define RCAR_DEVICE_SIZE (0x1A000000)
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#define RCAR_DEVICE_SIZE (0x1A000000)
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#define RCAR_LOG_RES_SIZE (512/8)
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#define RCAR_LOG_RES_SIZE (64)
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#define RCAR_LOG_HEADER_SIZE (16)
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#define RCAR_LOG_HEADER_SIZE (16)
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#define RCAR_LOG_OTHER_SIZE (RCAR_LOG_HEADER_SIZE + \
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#define RCAR_LOG_OTHER_SIZE (RCAR_LOG_HEADER_SIZE + \
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RCAR_LOG_RES_SIZE)
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RCAR_LOG_RES_SIZE)
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@ -139,8 +143,8 @@
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#define RCAR_SYSCSR U(0xE6180000) /* SYSC status */
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#define RCAR_SYSCSR U(0xE6180000) /* SYSC status */
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#define RCAR_PWRONCR3 U(0xE618014C) /* Power resume A53-SCU */
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#define RCAR_PWRONCR3 U(0xE618014C) /* Power resume A53-SCU */
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#define RCAR_PWRONCR5 U(0xE61801CC) /* Power resume A57-SCU */
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#define RCAR_PWRONCR5 U(0xE61801CC) /* Power resume A57-SCU */
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#define RCAR_PWROFFCR3 U(0xE6180144) /* Power shutof A53-SCU */
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#define RCAR_PWROFFCR3 U(0xE6180144) /* Power shutoff A53-SCU */
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#define RCAR_PWROFFCR5 U(0xE61801C4) /* Power shutof A57-SCU */
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#define RCAR_PWROFFCR5 U(0xE61801C4) /* Power shutoff A57-SCU */
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#define RCAR_PWRER3 U(0xE6180154) /* shutoff/resume error */
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#define RCAR_PWRER3 U(0xE6180154) /* shutoff/resume error */
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#define RCAR_PWRER5 U(0xE61801D4) /* shutoff/resume error */
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#define RCAR_PWRER5 U(0xE61801D4) /* shutoff/resume error */
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#define RCAR_SYSCISR U(0xE6180004) /* Interrupt status */
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#define RCAR_SYSCISR U(0xE6180004) /* Interrupt status */
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/*
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/*
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* Copyright (c) 2015-2019, Renesas Electronics Corporation. All rights reserved.
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* Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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#ifndef RCAR_PRIVATE_H
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#ifndef RCAR_PRIVATE_H
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#define RCAR_PRIVATE_H
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#define RCAR_PRIVATE_H
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#include <platform_def.h>
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#include <common/bl_common.h>
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#include <common/bl_common.h>
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#include <lib/bakery_lock.h>
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#include <lib/bakery_lock.h>
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#include <lib/el3_runtime/cpu_data.h>
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#include <lib/el3_runtime/cpu_data.h>
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#include <platform_def.h>
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typedef volatile struct mailbox {
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typedef volatile struct mailbox {
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unsigned long value __aligned(CACHE_WRITEBACK_GRANULE);
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unsigned long value __aligned(CACHE_WRITEBACK_GRANULE);
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} mailbox_t;
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} mailbox_t;
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@ -69,10 +69,11 @@ typedef struct rcar_cpu_data {
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#define rcar_lock_release(_lock_arg) \
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#define rcar_lock_release(_lock_arg) \
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bakery_lock_release(_lock_arg, \
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bakery_lock_release(_lock_arg, \
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CPU_DATA_PLAT_PCPU_OFFSET + RCAR_CPU_DATA_LOCK_OFFSET)
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CPU_DATA_PLAT_PCPU_OFFSET + RCAR_CPU_DATA_LOCK_OFFSET)
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/* Ensure that the size of the RCAR specific per-cpu data structure and the size
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/*
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* Ensure that the size of the RCAR specific per-cpu data structure and the size
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* of the memory allocated in generic per-cpu data for the platform are the same
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* of the memory allocated in generic per-cpu data for the platform are the same
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*/
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*/
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CASSERT(PLAT_PCPU_DATA_SIZE == sizeof(rcar_cpu_data_t),
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CASSERT(sizeof(rcar_cpu_data_t) == PLAT_PCPU_DATA_SIZE,
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rcar_pcpu_data_size_mismatch);
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rcar_pcpu_data_size_mismatch);
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#endif
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#endif
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/*
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/*
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2015-2017, Renesas Electronics Corporation. All rights reserved.
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* Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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