TF-A: Fix non-standard frequency issue in udelay
Previous implementation of timers assumed that clk_div has pretty representation in MHz (10MHz, 100MHz, etc). Unusual frequencies (99.99MHz) were causing assertion error and made udelay unusable. Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: Ic915fff224369d113fd9f8edbcfff169fca8beac
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -27,23 +27,32 @@ void udelay(uint32_t usec)
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(timer_ops->clk_div != 0U) &&
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(timer_ops->get_timer_value != NULL));
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uint32_t start, delta, total_delta;
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uint32_t start, delta;
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uint64_t total_delta;
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assert(usec < (UINT32_MAX / timer_ops->clk_div));
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assert(usec < (UINT64_MAX / timer_ops->clk_div));
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start = timer_ops->get_timer_value();
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/* Add an extra tick to avoid delaying less than requested. */
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total_delta =
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div_round_up(usec * timer_ops->clk_div,
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div_round_up((uint64_t)usec * timer_ops->clk_div,
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timer_ops->clk_mult) + 1U;
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/*
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* Precaution for the total_delta ~ UINT32_MAX and the fact that we
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* cannot catch every tick of the timer.
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* For example 100MHz timer over 25MHz APB will miss at least 4 ticks.
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* 1000U is an arbitrary big number which is believed to be sufficient.
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*/
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assert(total_delta < (UINT32_MAX - 1000U));
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do {
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/*
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* If the timer value wraps around, the subtraction will
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* overflow and it will still give the correct result.
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* delta is decreasing counter
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*/
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delta = start - timer_ops->get_timer_value(); /* Decreasing counter */
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delta = start - timer_ops->get_timer_value();
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} while (delta < total_delta);
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}
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@ -54,6 +63,7 @@ void udelay(uint32_t usec)
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***********************************************************/
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void mdelay(uint32_t msec)
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{
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assert((msec * 1000UL) < UINT32_MAX);
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udelay(msec * 1000U);
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}
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