feat(sgi): deviate from arm css common uart related definitions

The Neoverse reference design platforms will migrate to use different
set of secure and non-secure UART ports. This implies that the board
specific macros defined in the common Arm platform code will no longer
be usable for Neoverse reference design platforms.

In preparation for migrating to a different set of UART ports, add a
Neoverse reference design platform specific copy of the board
definitions. The value of these definitions will be changed in
subsequent patches.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: I39170848ecd81a7c1bbd3689bd905e45f9435f5c
This commit is contained in:
Rohit Mathew 2021-12-13 13:50:15 +00:00
parent 5e29432ebe
commit f2ccccaa81
2 changed files with 60 additions and 3 deletions

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@ -0,0 +1,57 @@
/*
* Copyright (c) 2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef SGI_SOC_CSS_DEF_H
#define SGI_SOC_CSS_DEF_H
#include <lib/utils_def.h>
#include <plat/arm/board/common/v2m_def.h>
#include <plat/arm/soc/common/soc_css_def.h>
#include <plat/common/common_def.h>
/*
* Definitions common to all ARM CSSv1-based development platforms
*/
/* Platform ID address */
#define BOARD_CSS_PLAT_ID_REG_ADDR UL(0x7ffe00e0)
/* Platform ID related accessors */
#define BOARD_CSS_PLAT_ID_REG_ID_MASK 0x0f
#define BOARD_CSS_PLAT_ID_REG_ID_SHIFT 0x0
#define BOARD_CSS_PLAT_TYPE_EMULATOR 0x02
#ifndef __ASSEMBLER__
#include <lib/mmio.h>
#define BOARD_CSS_GET_PLAT_TYPE(addr) \
((mmio_read_32(addr) & BOARD_CSS_PLAT_ID_REG_ID_MASK) \
>> BOARD_CSS_PLAT_ID_REG_ID_SHIFT)
#endif /* __ASSEMBLER__ */
#define MAX_IO_DEVICES 3
#define MAX_IO_HANDLES 4
/* Reserve the last block of flash for PSCI MEM PROTECT flag */
#define PLAT_ARM_FLASH_IMAGE_BASE V2M_FLASH0_BASE
#define PLAT_ARM_FLASH_IMAGE_MAX_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
#define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE
#define PLAT_ARM_NVM_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
/* UART related constants */
#define PLAT_ARM_BOOT_UART_BASE SOC_CSS_UART0_BASE
#define PLAT_ARM_BOOT_UART_CLK_IN_HZ SOC_CSS_UART0_CLK_IN_HZ
#define PLAT_ARM_RUN_UART_BASE SOC_CSS_UART1_BASE
#define PLAT_ARM_RUN_UART_CLK_IN_HZ SOC_CSS_UART1_CLK_IN_HZ
#define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_RUN_UART_BASE
#define PLAT_ARM_CRASH_UART_CLK_IN_HZ PLAT_ARM_RUN_UART_CLK_IN_HZ
#endif /* SGI_SOC_CSS_DEF_H */

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2020-2021, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2020-2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -7,10 +7,10 @@
#ifndef SGI_SOC_PLATFORM_DEF_H
#define SGI_SOC_PLATFORM_DEF_H
#include <sgi_base_platform_def.h>
#include <plat/arm/board/common/board_css_def.h>
#include <plat/arm/board/common/v2m_def.h>
#include <plat/arm/soc/common/soc_css_def.h>
#include <sgi_base_platform_def.h>
#include <sgi_soc_css_def.h>
/* Map the System registers to access from S-EL0 */
#define CSS_SYSTEMREG_DEVICE_BASE (0x1C010000)