diff --git a/bl1/bl1.ld.S b/bl1/bl1.ld.S index b20859b5b..e65ab9004 100644 --- a/bl1/bl1.ld.S +++ b/bl1/bl1.ld.S @@ -1,11 +1,12 @@ /* - * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ #include +#include #include OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT) @@ -148,15 +149,7 @@ SECTIONS __BSS_END__ = .; } >RAM - /* - * The xlat_table section is for full, aligned page tables (4K). - * Removing them from .bss avoids forcing 4K alignment on - * the .bss section. The tables are initialized to zero by the translation - * tables library. - */ - xlat_table (NOLOAD) : { - *(xlat_table) - } >RAM + XLAT_TABLE_SECTION >RAM #if USE_COHERENT_MEM /* diff --git a/bl2/bl2.ld.S b/bl2/bl2.ld.S index c1338e22d..d08b046e9 100644 --- a/bl2/bl2.ld.S +++ b/bl2/bl2.ld.S @@ -6,6 +6,7 @@ #include +#include #include OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT) @@ -125,15 +126,7 @@ SECTIONS __BSS_END__ = .; } >RAM - /* - * The xlat_table section is for full, aligned page tables (4K). - * Removing them from .bss avoids forcing 4K alignment on - * the .bss section. The tables are initialized to zero by the translation - * tables library. - */ - xlat_table (NOLOAD) : { - *(xlat_table) - } >RAM + XLAT_TABLE_SECTION >RAM #if USE_COHERENT_MEM /* diff --git a/bl2/bl2_el3.ld.S b/bl2/bl2_el3.ld.S index b6570ee3e..a72818c99 100644 --- a/bl2/bl2_el3.ld.S +++ b/bl2/bl2_el3.ld.S @@ -1,11 +1,12 @@ /* - * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ #include +#include #include OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT) @@ -188,15 +189,7 @@ SECTIONS __BSS_END__ = .; } >RAM - /* - * The xlat_table section is for full, aligned page tables (4K). - * Removing them from .bss avoids forcing 4K alignment on - * the .bss section. The tables are initialized to zero by the translation - * tables library. - */ - xlat_table (NOLOAD) : { - *(xlat_table) - } >RAM + XLAT_TABLE_SECTION >RAM #if USE_COHERENT_MEM /* diff --git a/bl2u/bl2u.ld.S b/bl2u/bl2u.ld.S index 8d257cee9..96545a3ab 100644 --- a/bl2u/bl2u.ld.S +++ b/bl2u/bl2u.ld.S @@ -1,11 +1,12 @@ /* - * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ #include +#include #include OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT) @@ -102,15 +103,7 @@ SECTIONS __BSS_END__ = .; } >RAM - /* - * The xlat_table section is for full, aligned page tables (4K). - * Removing them from .bss avoids forcing 4K alignment on - * the .bss section. The tables are initialized to zero by the translation - * tables library. - */ - xlat_table (NOLOAD) : { - *(xlat_table) - } >RAM + XLAT_TABLE_SECTION >RAM #if USE_COHERENT_MEM /* diff --git a/bl31/bl31.ld.S b/bl31/bl31.ld.S index 4a1c5f310..e0138acbb 100644 --- a/bl31/bl31.ld.S +++ b/bl31/bl31.ld.S @@ -6,6 +6,7 @@ #include +#include #include OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT) @@ -287,15 +288,7 @@ SECTIONS __BSS_END__ = .; } >NOBITS - /* - * The xlat_table section is for full, aligned page tables (4K). - * Removing them from .bss avoids forcing 4K alignment on - * the .bss section. The tables are initialized to zero by the translation - * tables library. - */ - xlat_table (NOLOAD) : { - *(xlat_table) - } >NOBITS + XLAT_TABLE_SECTION >NOBITS #if USE_COHERENT_MEM /* diff --git a/bl32/sp_min/sp_min.ld.S b/bl32/sp_min/sp_min.ld.S index 6997a7fdb..3b1ca1b58 100644 --- a/bl32/sp_min/sp_min.ld.S +++ b/bl32/sp_min/sp_min.ld.S @@ -1,11 +1,12 @@ /* - * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ #include +#include #include OUTPUT_FORMAT(elf32-littlearm) @@ -196,15 +197,7 @@ SECTIONS __BSS_END__ = .; } >RAM - /* - * The xlat_table section is for full, aligned page tables (4K). - * Removing them from .bss avoids forcing 4K alignment on - * the .bss section. The tables are initialized to zero by the translation - * tables library. - */ - xlat_table (NOLOAD) : { - *(xlat_table) - } >RAM + XLAT_TABLE_SECTION >RAM __BSS_SIZE__ = SIZEOF(.bss); diff --git a/bl32/tsp/tsp.ld.S b/bl32/tsp/tsp.ld.S index 592e24557..da60c63a7 100644 --- a/bl32/tsp/tsp.ld.S +++ b/bl32/tsp/tsp.ld.S @@ -4,6 +4,7 @@ * SPDX-License-Identifier: BSD-3-Clause */ +#include #include #include @@ -125,15 +126,7 @@ SECTIONS __BSS_END__ = .; } >RAM - /* - * The xlat_table section is for full, aligned page tables (4K). - * Removing them from .bss avoids forcing 4K alignment on - * the .bss section. The tables are initialized to zero by the translation - * tables library. - */ - xlat_table (NOLOAD) : { - *(xlat_table) - } >RAM + XLAT_TABLE_SECTION >RAM #if USE_COHERENT_MEM /* diff --git a/include/common/bl_common.ld.h b/include/common/bl_common.ld.h new file mode 100644 index 000000000..32c54b4d2 --- /dev/null +++ b/include/common/bl_common.ld.h @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef BL_COMMON_LD_H +#define BL_COMMON_LD_H + +/* + * The xlat_table section is for full, aligned page tables (4K). + * Removing them from .bss avoids forcing 4K alignment on + * the .bss section. The tables are initialized to zero by the translation + * tables library. + */ +#define XLAT_TABLE_SECTION \ + xlat_table (NOLOAD) : { \ + *(xlat_table) \ + } + +#endif /* BL_COMMON_LD_H */ diff --git a/include/lib/xlat_tables/xlat_tables_v2.h b/include/lib/xlat_tables/xlat_tables_v2.h index a80fab073..ab311f4cb 100644 --- a/include/lib/xlat_tables/xlat_tables_v2.h +++ b/include/lib/xlat_tables/xlat_tables_v2.h @@ -164,14 +164,20 @@ typedef struct xlat_ctx xlat_ctx_t; * Would typically be PLAT_VIRT_ADDR_SPACE_SIZE * (resp. PLAT_PHY_ADDR_SPACE_SIZE) for the translation context describing the * BL image currently executing. + + * _base_table_section: + * Specify the name of the section where the base translation tables have to + * be placed by the linker. */ #define REGISTER_XLAT_CONTEXT(_ctx_name, _mmap_count, _xlat_tables_count, \ - _virt_addr_space_size, _phy_addr_space_size) \ + _virt_addr_space_size, _phy_addr_space_size, \ + _base_table_section) \ REGISTER_XLAT_CONTEXT_FULL_SPEC(_ctx_name, (_mmap_count), \ (_xlat_tables_count), \ (_virt_addr_space_size), \ (_phy_addr_space_size), \ - EL_REGIME_INVALID, "xlat_table") + EL_REGIME_INVALID, \ + "xlat_table", (_base_table_section)) /* * Same as REGISTER_XLAT_CONTEXT plus the additional parameters: @@ -191,7 +197,9 @@ typedef struct xlat_ctx xlat_ctx_t; (_xlat_tables_count), \ (_virt_addr_space_size), \ (_phy_addr_space_size), \ - (_xlat_regime), (_section_name)) + (_xlat_regime), \ + (_section_name), ".bss" \ +) /****************************************************************************** * Generic translation table APIs. diff --git a/include/lib/xlat_tables/xlat_tables_v2_helpers.h b/include/lib/xlat_tables/xlat_tables_v2_helpers.h index c88fa4dd5..62f853d18 100644 --- a/include/lib/xlat_tables/xlat_tables_v2_helpers.h +++ b/include/lib/xlat_tables/xlat_tables_v2_helpers.h @@ -24,6 +24,7 @@ #include #include +#include #include #include @@ -135,7 +136,8 @@ struct xlat_ctx { #define REGISTER_XLAT_CONTEXT_FULL_SPEC(_ctx_name, _mmap_count, \ _xlat_tables_count, _virt_addr_space_size, \ - _phy_addr_space_size, _xlat_regime, _section_name)\ + _phy_addr_space_size, _xlat_regime, \ + _table_section, _base_table_section) \ CASSERT(CHECK_PHY_ADDR_SPACE_SIZE(_phy_addr_space_size), \ assert_invalid_physical_addr_space_sizefor_##_ctx_name);\ \ @@ -143,52 +145,13 @@ struct xlat_ctx { \ static uint64_t _ctx_name##_xlat_tables[_xlat_tables_count] \ [XLAT_TABLE_ENTRIES] \ - __aligned(XLAT_TABLE_SIZE) __section(_section_name); \ - \ - static uint64_t _ctx_name##_base_xlat_table \ - [GET_NUM_BASE_LEVEL_ENTRIES(_virt_addr_space_size)] \ - __aligned(GET_NUM_BASE_LEVEL_ENTRIES(_virt_addr_space_size)\ - * sizeof(uint64_t)); \ - \ - XLAT_ALLOC_DYNMAP_STRUCT(_ctx_name, _xlat_tables_count) \ - \ - static xlat_ctx_t _ctx_name##_xlat_ctx = { \ - .pa_max_address = (_phy_addr_space_size) - 1ULL, \ - .va_max_address = (_virt_addr_space_size) - 1UL, \ - .mmap = _ctx_name##_mmap, \ - .mmap_num = (_mmap_count), \ - .tables = _ctx_name##_xlat_tables, \ - .tables_num = _xlat_tables_count, \ - XLAT_CTX_INIT_TABLE_ATTR() \ - XLAT_REGISTER_DYNMAP_STRUCT(_ctx_name) \ - .next_table = 0, \ - .base_table = _ctx_name##_base_xlat_table, \ - .base_table_entries = \ - GET_NUM_BASE_LEVEL_ENTRIES(_virt_addr_space_size),\ - .max_pa = 0U, \ - .max_va = 0U, \ - .base_level = GET_XLAT_TABLE_LEVEL_BASE(_virt_addr_space_size),\ - .initialized = false, \ - .xlat_regime = (_xlat_regime) \ - } - -#define REGISTER_XLAT_CONTEXT_RO_BASE_TABLE(_ctx_name, _mmap_count, \ - _xlat_tables_count, _virt_addr_space_size, \ - _phy_addr_space_size, _xlat_regime, _section_name)\ - CASSERT(CHECK_PHY_ADDR_SPACE_SIZE(_phy_addr_space_size), \ - assert_invalid_physical_addr_space_sizefor_##_ctx_name);\ - \ - static mmap_region_t _ctx_name##_mmap[_mmap_count + 1]; \ - \ - static uint64_t _ctx_name##_xlat_tables[_xlat_tables_count] \ - [XLAT_TABLE_ENTRIES] \ - __aligned(XLAT_TABLE_SIZE) __section(_section_name); \ + __aligned(XLAT_TABLE_SIZE) __section(_table_section); \ \ static uint64_t _ctx_name##_base_xlat_table \ [GET_NUM_BASE_LEVEL_ENTRIES(_virt_addr_space_size)] \ __aligned(GET_NUM_BASE_LEVEL_ENTRIES(_virt_addr_space_size)\ * sizeof(uint64_t)) \ - __section(".rodata"); \ + __section(_base_table_section); \ \ XLAT_ALLOC_DYNMAP_STRUCT(_ctx_name, _xlat_tables_count) \ \ @@ -198,13 +161,13 @@ struct xlat_ctx { .mmap = _ctx_name##_mmap, \ .mmap_num = (_mmap_count), \ .tables = _ctx_name##_xlat_tables, \ - .tables_num = _xlat_tables_count, \ + .tables_num = ARRAY_SIZE(_ctx_name##_xlat_tables), \ XLAT_CTX_INIT_TABLE_ATTR() \ XLAT_REGISTER_DYNMAP_STRUCT(_ctx_name) \ .next_table = 0, \ .base_table = _ctx_name##_base_xlat_table, \ .base_table_entries = \ - GET_NUM_BASE_LEVEL_ENTRIES(_virt_addr_space_size),\ + ARRAY_SIZE(_ctx_name##_base_xlat_table), \ .max_pa = 0U, \ .max_va = 0U, \ .base_level = GET_XLAT_TABLE_LEVEL_BASE(_virt_addr_space_size),\ diff --git a/lib/xlat_tables_v2/xlat_tables_context.c b/lib/xlat_tables_v2/xlat_tables_context.c index adca57875..a1c974ec0 100644 --- a/lib/xlat_tables_v2/xlat_tables_context.c +++ b/lib/xlat_tables_v2/xlat_tables_context.c @@ -26,14 +26,15 @@ uint64_t mmu_cfg_params[MMU_CFG_PARAM_MAX]; * currently executing. */ #if PLAT_RO_XLAT_TABLES -REGISTER_XLAT_CONTEXT_RO_BASE_TABLE(tf, MAX_MMAP_REGIONS, MAX_XLAT_TABLES, - PLAT_VIRT_ADDR_SPACE_SIZE, PLAT_PHY_ADDR_SPACE_SIZE, - EL_REGIME_INVALID, "xlat_table"); +#define BASE_XLAT_TABLE_SECTION ".rodata" #else -REGISTER_XLAT_CONTEXT(tf, MAX_MMAP_REGIONS, MAX_XLAT_TABLES, - PLAT_VIRT_ADDR_SPACE_SIZE, PLAT_PHY_ADDR_SPACE_SIZE); +#define BASE_XLAT_TABLE_SECTION ".bss" #endif +REGISTER_XLAT_CONTEXT(tf, MAX_MMAP_REGIONS, MAX_XLAT_TABLES, + PLAT_VIRT_ADDR_SPACE_SIZE, PLAT_PHY_ADDR_SPACE_SIZE, + BASE_XLAT_TABLE_SECTION); + void mmap_add_region(unsigned long long base_pa, uintptr_t base_va, size_t size, unsigned int attr) { diff --git a/plat/mediatek/mt6795/bl31.ld.S b/plat/mediatek/mt6795/bl31.ld.S index cf68b711e..0fd38664c 100644 --- a/plat/mediatek/mt6795/bl31.ld.S +++ b/plat/mediatek/mt6795/bl31.ld.S @@ -1,9 +1,10 @@ /* - * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ +#include #include #include @@ -131,15 +132,7 @@ SECTIONS ASSERT(. <= BL31_LIMIT, "BL3-1 image has exceeded its limit.") - /* - * The xlat_table section is for full, aligned page tables (4K). - * Removing them from .bss avoids forcing 4K alignment on - * the .bss section. The tables are initialized to zero by the translation - * tables library. - */ - xlat_table (NOLOAD) : { - *(xlat_table) - } >RAM2 + XLAT_TABLE_SECTION >RAM2 #if USE_COHERENT_MEM /*