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plat: ti: k3: board: Lets cast our macros 

Lets cast our macros to the right types and reduce a few MISRA
warnings.

Signed-off-by: Nishanth Menon <nm@ti.com>
Change-Id: I0dc06072713fe7c9440eca0635094c5f3ceb7f1c
This commit is contained in:
Nishanth Menon 2021-03-26 02:01:38 -05:00
parent a2b56476bb
commit f5872a0047
2 changed files with 10 additions and 10 deletions
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10
plat/ti/k3/board/generic/include/board_def.h
View File

@ -19,14 +19,14 @@
* This RAM will be used for the bootloader including code, bss, and stacks.
* It may need to be increased if BL31 grows in size.
*/
#define SEC_SRAM_BASE 0x70000000 /* Base of MSMC SRAM */
#define SEC_SRAM_SIZE 0x00020000 /* 128k */
#define SEC_SRAM_BASE UL(0x70000000) /* Base of MSMC SRAM */
#define SEC_SRAM_SIZE UL(0x00020000) /* 128k */
#define PLAT_MAX_OFF_STATE U(2)
#define PLAT_MAX_RET_STATE U(1)
#define PLAT_PROC_START_ID 32
#define PLAT_PROC_DEVICE_START_ID 202
#define PLAT_CLUSTER_DEVICE_START_ID 198
#define PLAT_PROC_START_ID U(32)
#define PLAT_PROC_DEVICE_START_ID U(202)
#define PLAT_CLUSTER_DEVICE_START_ID U(198)
#endif /* BOARD_DEF_H */

10
plat/ti/k3/board/lite/include/board_def.h
View File

@ -21,14 +21,14 @@
* Current computation assumes data structures necessary for GIC and ARM for
* a single cluster of 4 processor.
*/
#define SEC_SRAM_BASE 0x70000000 /* Base of SRAM */
#define SEC_SRAM_SIZE 0x0001c000 /* 112k */
#define SEC_SRAM_BASE UL(0x70000000) /* Base of SRAM */
#define SEC_SRAM_SIZE UL(0x0001c000) /* 112k */
#define PLAT_MAX_OFF_STATE U(2)
#define PLAT_MAX_RET_STATE U(1)
#define PLAT_PROC_START_ID 32
#define PLAT_PROC_DEVICE_START_ID 135
#define PLAT_CLUSTER_DEVICE_START_ID 134
#define PLAT_PROC_START_ID U(32)
#define PLAT_PROC_DEVICE_START_ID U(135)
#define PLAT_CLUSTER_DEVICE_START_ID U(134)
#endif /* BOARD_DEF_H */