diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index e9ff17e8c..8152c00d5 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -249,6 +249,9 @@ For Cortex-A76, the following errata build flags are defined : limitation of errata framework this errata is applied to all revisions of Cortex-A76 CPU. +- ``ERRATA_A76_1868343``: This applies errata 1868343 workaround to Cortex-A76 + CPU. This needs to be enabled only for revision <= r4p0 of the CPU. + For Cortex-A77, the following errata build flags are defined : - ``ERRATA_A77_1508412``: This applies errata 1508412 workaround to Cortex-A77 diff --git a/lib/cpus/aarch64/cortex_a76.S b/lib/cpus/aarch64/cortex_a76.S index 0895946e4..98a11832d 100644 --- a/lib/cpus/aarch64/cortex_a76.S +++ b/lib/cpus/aarch64/cortex_a76.S @@ -337,44 +337,6 @@ func check_errata_1262888 b cpu_rev_var_ls endfunc check_errata_1262888 - /* -------------------------------------------------- - * Errata Workaround for Cortex A76 Errata #1275112 - * and Errata #1262606. - * This applies only to revision <= r3p0 of Cortex A76. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x17 - * -------------------------------------------------- - */ -func errata_a76_1275112_1262606_wa - /* - * Compare x0 against revision r3p0 - */ - mov x17, x30 - /* - * Since both errata #1275112 and #1262606 have the same check, we can - * invoke any one of them for the check here. - */ - bl check_errata_1275112 - cbz x0, 1f - mrs x1, CORTEX_A76_CPUACTLR_EL1 - orr x1, x1, CORTEX_A76_CPUACTLR_EL1_BIT_13 - msr CORTEX_A76_CPUACTLR_EL1, x1 - isb -1: - ret x17 -endfunc errata_a76_1275112_1262606_wa - -func check_errata_1262606 - mov x1, #0x30 - b cpu_rev_var_ls -endfunc check_errata_1262606 - -func check_errata_1275112 - mov x1, #0x30 - b cpu_rev_var_ls -endfunc check_errata_1275112 - /* --------------------------------------------------- * Errata Workaround for Cortex A76 Errata #1286807. * This applies only to revision <= r3p0 of Cortex A76. @@ -448,6 +410,55 @@ func check_errata_1800710 b cpu_rev_var_ls endfunc check_errata_1800710 + /* -------------------------------------------------- + * Errata Workaround for Cortex A76 Errata #1262606, + * #1275112, and #1868343. #1262606 and #1275112 + * apply to revisions <= r3p0 and #1868343 applies to + * revisions <= r4p0. + * Inputs: + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x17 + * -------------------------------------------------- + */ + +func errata_a76_1262606_1275112_1868343_wa + mov x17, x30 + +/* Check for <= r3p0 cases and branch if check passes. */ +#if ERRATA_A76_1262606 || ERRATA_A76_1275112 + bl check_errata_1262606 + cbnz x0, 1f +#endif + +/* Check for <= r4p0 cases and branch if check fails. */ +#if ERRATA_A76_1868343 + bl check_errata_1868343 + cbz x0, 2f +#endif +1: + mrs x1, CORTEX_A76_CPUACTLR_EL1 + orr x1, x1, #CORTEX_A76_CPUACTLR_EL1_BIT_13 + msr CORTEX_A76_CPUACTLR_EL1, x1 + isb +2: + ret x17 +endfunc errata_a76_1262606_1275112_1868343_wa + +func check_errata_1262606 + mov x1, #0x30 + b cpu_rev_var_ls +endfunc check_errata_1262606 + +func check_errata_1275112 + mov x1, #0x30 + b cpu_rev_var_ls +endfunc check_errata_1275112 + +func check_errata_1868343 + mov x1, #0x40 + b cpu_rev_var_ls +endfunc check_errata_1868343 + func check_errata_cve_2018_3639 #if WORKAROUND_CVE_2018_3639 mov x0, #ERRATA_APPLIES @@ -512,9 +523,9 @@ func cortex_a76_reset_func bl errata_a76_1257314_wa #endif -#if ERRATA_A76_1262606 || ERRATA_A76_1275112 +#if ERRATA_A76_1262606 || ERRATA_A76_1275112 || ERRATA_A76_1868343 mov x0, x18 - bl errata_a76_1275112_1262606_wa + bl errata_a76_1262606_1275112_1868343_wa #endif #if ERRATA_A76_1262888 @@ -615,6 +626,7 @@ func cortex_a76_errata_report report_errata ERRATA_A76_1791580, cortex_a76, 1791580 report_errata ERRATA_A76_1800710, cortex_a76, 1800710 report_errata ERRATA_A76_1165522, cortex_a76, 1165522 + report_errata ERRATA_A76_1868343, cortex_a76, 1868343 report_errata WORKAROUND_CVE_2018_3639, cortex_a76, cve_2018_3639 report_errata ERRATA_DSU_798953, cortex_a76, dsu_798953 report_errata ERRATA_DSU_936184, cortex_a76, dsu_936184 diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index 5df94cce4..925ed5f08 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -278,6 +278,10 @@ ERRATA_A76_1800710 ?=0 # to all revisions of Cortex A76 cpu. ERRATA_A76_1165522 ?=0 +# Flag to apply erratum 1868343 workaround during reset. This erratum applies +# only to revision <= r4p0 of the Cortex A76 cpu. +ERRATA_A76_1868343 ?=0 + # Flag to apply erratum 1508412 workaround during reset. This erratum applies # only to revision <= r1p0 of the Cortex A77 cpu. ERRATA_A77_1508412 ?=0 @@ -555,6 +559,10 @@ $(eval $(call add_define,ERRATA_A76_1800710)) $(eval $(call assert_boolean,ERRATA_A76_1165522)) $(eval $(call add_define,ERRATA_A76_1165522)) +# Process ERRATA_A76_1868343 flag +$(eval $(call assert_boolean,ERRATA_A76_1868343)) +$(eval $(call add_define,ERRATA_A76_1868343)) + # Process ERRATA_A77_1508412 flag $(eval $(call assert_boolean,ERRATA_A77_1508412)) $(eval $(call add_define,ERRATA_A77_1508412))