Merge "Workaround for Cortex A77 erratum 1800714" into integration
This commit is contained in:
Lauren Wehrmeister
TrustedFirmware Code Review
commit
f998d15aee
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@ -233,6 +233,11 @@ For Cortex-A76, the following errata build flags are defined :
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- ``ERRATA_A76_1800710``: This applies errata 1800710 workaround to Cortex-A76
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CPU. This needs to be enabled only for revision <= r4p0 of the CPU.
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For Cortex-A77, the following errata build flags are defined :
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- ``ERRATA_A77_1800714``: This applies errata 1800714 workaround to Cortex-A77
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CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
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For Cortex-A78, the following errata build flags are defined :
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- ``ERRATA_A78_1688305``: This applies errata 1688305 workaround to Cortex-A78
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -16,6 +16,7 @@
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* CPU Extended Control register specific definitions.
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******************************************************************************/
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#define CORTEX_A77_CPUECTLR_EL1 S3_0_C15_C1_4
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#define CORTEX_A77_CPUECTLR_EL1_BIT_53 (ULL(1) << 53)
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/*******************************************************************************
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* CPU Power Control register specific definitions.
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -21,6 +21,53 @@
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#error "Cortex-A77 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
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#endif
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/* --------------------------------------------------
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* Errata Workaround for Cortex A77 Errata #1800714.
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* This applies to revision <= r1p1 of Cortex A77.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* --------------------------------------------------
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*/
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func errata_a77_1800714_wa
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/* Compare x0 against revision <= r1p1 */
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mov x17, x30
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bl check_errata_1800714
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cbz x0, 1f
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/* Disable allocation of splintered pages in the L2 TLB */
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mrs x1, CORTEX_A77_CPUECTLR_EL1
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orr x1, x1, CORTEX_A77_CPUECTLR_EL1_BIT_53
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msr CORTEX_A77_CPUECTLR_EL1, x1
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isb
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1:
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ret x17
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endfunc errata_a77_1800714_wa
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func check_errata_1800714
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/* Applies to everything <= r1p1 */
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mov x1, #0x11
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b cpu_rev_var_ls
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endfunc check_errata_1800714
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/* -------------------------------------------------
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* The CPU Ops reset function for Cortex-A77.
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* Shall clobber: x0-x19
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* -------------------------------------------------
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*/
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func cortex_a77_reset_func
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mov x19, x30
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bl cpu_get_rev_var
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mov x18, x0
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#if ERRATA_A77_1800714
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mov x0, x18
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bl errata_a77_1800714_wa
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#endif
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ret x19
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endfunc cortex_a77_reset_func
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/* ---------------------------------------------
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* HW will do the cache maintenance while powering down
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* ---------------------------------------------
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@ -42,6 +89,18 @@ endfunc cortex_a77_core_pwr_dwn
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* Errata printing function for Cortex-A77. Must follow AAPCS.
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*/
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func cortex_a77_errata_report
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stp x8, x30, [sp, #-16]!
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bl cpu_get_rev_var
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mov x8, x0
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/*
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* Report all errata. The revision-variant information is passed to
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* checking functions of each errata.
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*/
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report_errata ERRATA_A77_1800714, cortex_a77, 1800714
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ldp x8, x30, [sp], #16
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ret
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endfunc cortex_a77_errata_report
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#endif
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@ -67,5 +126,5 @@ func cortex_a77_cpu_reg_dump
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endfunc cortex_a77_cpu_reg_dump
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declare_cpu_ops cortex_a77, CORTEX_A77_MIDR, \
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CPU_NO_RESET_FUNC, \
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cortex_a77_reset_func, \
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cortex_a77_core_pwr_dwn
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@ -258,6 +258,10 @@ ERRATA_A76_1791580 ?=0
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# only to revision <= r4p0 of the Cortex A76 cpu.
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ERRATA_A76_1800710 ?=0
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# Flag to apply erratum 1800714 workaround during reset. This erratum applies
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# only to revision <= r1p1 of the Cortex A77 cpu.
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ERRATA_A77_1800714 ?=0
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# Flag to apply erratum 1688305 workaround during reset. This erratum applies
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# to revisions r0p0 - r1p0 of the A78 cpu.
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ERRATA_A78_1688305 ?=0
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@ -503,6 +507,10 @@ $(eval $(call add_define,ERRATA_A76_1791580))
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$(eval $(call assert_boolean,ERRATA_A76_1800710))
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$(eval $(call add_define,ERRATA_A76_1800710))
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# Process ERRATA_A77_1800714 flag
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$(eval $(call assert_boolean,ERRATA_A77_1800714))
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$(eval $(call add_define,ERRATA_A77_1800714))
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# Process ERRATA_A78_1688305 flag
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$(eval $(call assert_boolean,ERRATA_A78_1688305))
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$(eval $(call add_define,ERRATA_A78_1688305))
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