From fa405e3b82ae9ed764e6f37745e612c86a8be183 Mon Sep 17 00:00:00 2001 From: Radoslaw Biernacki Date: Thu, 7 Jun 2018 20:14:36 +0200 Subject: [PATCH] qemu/qemu_sbsa: Adding memory mapping for both FLASH0/FLASH1 This patch adds mapping for secure FLASH0 for qemu/virt and qemu/qemu_sbsa platforms. This change is targeted for sbsa but since both platforms share common code, changes in common defines was necessary. For qemu_sbsa, this patch adds necessary mapping in order to boot without semi-hosting from secure FLASH0. EFI need to stay in FLASH1 (share it with variables) since it need to "run in place" in non secure domain. Changes for this are under RFC at edk2-platforms mailing list: https://patches.linaro.org/patch/171327/ (edk2-platforms/Platform/Qemu/SbsaQemu/SbsaQemu.dsc). In docs qemu/virt is described as using semi-hosting, therefore this change should be orthogonal to existing assumptions while giving possibility to store both bl1 and fip in FLASH0 at some point (additional changes required for that). Signed-off-by: Radoslaw Biernacki Change-Id: I782bc3637c91c01eaee680b3c5c408e24b4b6e28 --- plat/qemu/common/qemu_common.c | 7 ++++++- plat/qemu/qemu/include/platform_def.h | 10 ++++++---- plat/qemu/qemu_sbsa/include/platform_def.h | 4 ++-- 3 files changed, 14 insertions(+), 7 deletions(-) diff --git a/plat/qemu/common/qemu_common.c b/plat/qemu/common/qemu_common.c index 56bf9532f..365cfb7f0 100644 --- a/plat/qemu/common/qemu_common.c +++ b/plat/qemu/common/qemu_common.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -41,6 +41,9 @@ #define MAP_FLASH0 MAP_REGION_FLAT(QEMU_FLASH0_BASE, QEMU_FLASH0_SIZE, \ MT_MEMORY | MT_RO | MT_SECURE) +#define MAP_FLASH1 MAP_REGION_FLAT(QEMU_FLASH1_BASE, QEMU_FLASH1_SIZE, \ + MT_MEMORY | MT_RO | MT_SECURE) + /* * Table of regions for various BL stages to map using the MMU. * This doesn't include TZRAM as the 'mem_layout' argument passed to @@ -49,6 +52,7 @@ #ifdef IMAGE_BL1 static const mmap_region_t plat_qemu_mmap[] = { MAP_FLASH0, + MAP_FLASH1, MAP_SHARED_RAM, MAP_DEVICE0, #ifdef MAP_DEVICE1 @@ -63,6 +67,7 @@ static const mmap_region_t plat_qemu_mmap[] = { #ifdef IMAGE_BL2 static const mmap_region_t plat_qemu_mmap[] = { MAP_FLASH0, + MAP_FLASH1, MAP_SHARED_RAM, MAP_DEVICE0, #ifdef MAP_DEVICE1 diff --git a/plat/qemu/qemu/include/platform_def.h b/plat/qemu/qemu/include/platform_def.h index a90573712..c6b4db506 100644 --- a/plat/qemu/qemu/include/platform_def.h +++ b/plat/qemu/qemu/include/platform_def.h @@ -170,7 +170,7 @@ #define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32) #define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32) -#define MAX_MMAP_REGIONS 10 +#define MAX_MMAP_REGIONS 11 #define MAX_XLAT_TABLES 6 #define MAX_IO_DEVICES 3 #define MAX_IO_HANDLES 4 @@ -191,11 +191,13 @@ #define PLAT_QEMU_CONSOLE_BAUDRATE 115200 -#define QEMU_FLASH0_BASE 0x04000000 +#define QEMU_FLASH0_BASE 0x00000000 #define QEMU_FLASH0_SIZE 0x04000000 +#define QEMU_FLASH1_BASE 0x04000000 +#define QEMU_FLASH1_SIZE 0x04000000 -#define PLAT_QEMU_FIP_BASE QEMU_FLASH0_BASE -#define PLAT_QEMU_FIP_MAX_SIZE QEMU_FLASH0_SIZE +#define PLAT_QEMU_FIP_BASE QEMU_FLASH1_BASE +#define PLAT_QEMU_FIP_MAX_SIZE QEMU_FLASH1_SIZE #define DEVICE0_BASE 0x08000000 #define DEVICE0_SIZE 0x01000000 diff --git a/plat/qemu/qemu_sbsa/include/platform_def.h b/plat/qemu/qemu_sbsa/include/platform_def.h index c57a5e857..333b21cc1 100644 --- a/plat/qemu/qemu_sbsa/include/platform_def.h +++ b/plat/qemu/qemu_sbsa/include/platform_def.h @@ -178,8 +178,8 @@ #define QEMU_FLASH1_BASE 0x10000000 #define QEMU_FLASH1_SIZE 0x10000000 -#define PLAT_QEMU_FIP_BASE QEMU_FLASH0_BASE -#define PLAT_QEMU_FIP_MAX_SIZE QEMU_FLASH0_SIZE +#define PLAT_QEMU_FIP_BASE 0x00008000 +#define PLAT_QEMU_FIP_MAX_SIZE 0x00020000 /* This is map from GIC_DIST up to last CPU (255) GIC_REDISTR */ #define DEVICE0_BASE 0x40000000