zynqmp: pm: Rename FPD WDT clock ID

This patch renames FPD WDT clock ID from CLK_WDT to CLK_FPD_WDT.

Signed-off-by: Mounika Grace Akula <mounika.grace.akula@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I4d00a59b1dc54920115a2da55e8a06347fe2231c
This commit is contained in:
Mounika Grace Akula 2019-01-09 17:38:12 +05:30 committed by Jolly Shah
parent 65501a7ca4
commit fa8ae3c8d7
2 changed files with 5 additions and 5 deletions

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -2035,8 +2035,8 @@ static struct pm_clock clocks[] = {
.nodes = &acpu_half_nodes,
.num_nodes = ARRAY_SIZE(acpu_half_nodes),
},
[CLK_WDT] = {
.name = "wdt",
[CLK_FPD_WDT] = {
.name = "fpd_wdt",
.control_reg = FPD_SLCR_WDT_CLK_SEL,
.status_reg = 0,
.parents = &((int32_t []) {

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -132,7 +132,7 @@ enum clock_id {
CLK_PL1_REF,
CLK_PL2_REF,
CLK_PL3_REF,
CLK_WDT,
CLK_FPD_WDT,
CLK_IOPLL_INT,
CLK_IOPLL_PRE_SRC,
CLK_IOPLL_HALF,