Commit Graph

12 Commits

Author SHA1 Message Date
Ruchika Gupta 5e690269d5 feat(qemu): add support for measured boot
Add helper functions to generate event log for qemu
when MEASURED_BOOT=1.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Change-Id: I17a098cb614a3a89fe0fe9577bed6edda8bfd070
2022-04-28 14:55:36 +01:00
lwpDarren 325716c97b fix(plat/qemu): (NS_DRAM0_BASE + NS_DRAM0_SIZE) ADDR overflow 32bit
after this commit: If15cf3b9d3e2e7876c40ce888f22e887893fe696
plat/qemu/common/qemu_pm.c:116:	    (entrypoint < (NS_DRAM0_BASE + NS_DRAM0_SIZE)))
the above line (NS_DRAM0_BASE + NS_DRAM0_SIZE) = 0x100000000, which will
overflow 32bit and cause ERROR
SO add ULL to fix it

tested on compiler:
gcc version 10.2.1 20201103 (GNU Toolchain for the A-profile Architecture 10.2-2020.11 (arm-10.16))

Signed-off-by: Darren Liang <lwp513@qq.com>
Change-Id: I1d769b0803142d37bd2968d765ab04a9c7c5c21a
2021-08-18 16:13:22 +01:00
Ruchika Gupta 82f9930d71 refactor(plat/qemu): increase the non-secure DRAM size
In the qemu memory map 1GB and up is RAM. Change the
size of NS DRAM to 3GB to support VM's with more
memory requirements.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Change-Id: If15cf3b9d3e2e7876c40ce888f22e887893fe696
2021-07-05 13:59:11 +05:30
Madhukar Pappireddy 0aa70f4c4c Merge "plat/qemu: trigger reboot with secure pl061" into integration 2021-02-25 22:03:24 +00:00
Maxim Uvarov ffb07b0438 plat/qemu: trigger reboot with secure pl061
Secure pl061 qemu driver allows to rize the GPIO pin
from the secure world to reboot and power down
virtual machine.

Do not define secure-gpio for sbsa-ref platform due to
reboot is done via sbsa-ec watchdog.

Signed-off-by: Maxim Uvarov <maxim.uvarov@linaro.org>
Change-Id: I508d7c5cf4c75cb169b34b00682a76f6761d3869
2021-02-04 10:21:52 +03:00
Graeme Gregory 3063177e39 qemu/aarch64/plat_helpers.S : calculate the position shift
Rather than re-create this file in multiple qemu variants instead
caclulate the shift needed to convert MPIDR to position.

Add a new PLATFORM_CPU_PER_CLUSTER_SHIFT define in platform_def.h
for both qemu and qemu_sbsa to enable this calculation.

Signed-off-by: Graeme Gregory <graeme@nuviainc.com>
Change-Id: I0e3a86354aa716d95150a3a34b15287cd70c8fd2
2021-01-19 18:35:55 +00:00
Sumit Garg 518577627e qemu: Support optional encryption of BL31 and BL32 images
Enable encryption IO layer to be stacked above FIP IO layer for optional
encryption of Bl31 and BL32 images in case ENCRYPT_BL31 or ENCRYPT_BL32
build flag is set.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Change-Id: I24cba64728861e833abffc3d5d9807599c49feb6
2020-03-06 16:40:37 +05:30
Sumit Garg a886bbeceb qemu: Update flash address map to keep FIP in secure FLASH0
Secure FLASH0 memory map looks like:
- Offset: 0 to 256K -> bl1.bin
- Offset: 256K to 4.25M -> fip.bin

FLASH1 is normally used via UEFI/edk2 to keep varstore.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Change-Id: I6883f556c22d6a5d3fa3846c703bebc2abe36765
2020-03-06 16:40:37 +05:30
Deepika Bhavnani 645ac02dd6 qemu: Unify Platform specific defines for PSCI module
PLATFORM_CORE_COUNT - Unsigned int
PLATFORM_CLUSTER_COUNT - Unsigned int
PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int
PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int

Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com>
Change-Id: I460b35f5a4ec47b13d4e811bb20881ce314e9259
2020-01-24 13:15:33 +00:00
Radoslaw Biernacki fa405e3b82 qemu/qemu_sbsa: Adding memory mapping for both FLASH0/FLASH1
This patch adds mapping for secure FLASH0 for qemu/virt and
qemu/qemu_sbsa platforms. This change is targeted for sbsa but since both
platforms share common code, changes in common defines was necessary.

For qemu_sbsa, this patch adds necessary mapping in order to boot without
semi-hosting from secure FLASH0. EFI need to stay in FLASH1 (share it with
variables) since it need to "run in place" in non secure domain. Changes
for this are under RFC at edk2-platforms mailing list:
https://patches.linaro.org/patch/171327/
(edk2-platforms/Platform/Qemu/SbsaQemu/SbsaQemu.dsc).

In docs qemu/virt is described as using semi-hosting, therefore this change
should be orthogonal to existing assumptions while giving possibility to
store both bl1 and fip in FLASH0 at some point (additional changes required
for that).

Signed-off-by: Radoslaw Biernacki <radoslaw.biernacki@linaro.org>
Change-Id: I782bc3637c91c01eaee680b3c5c408e24b4b6e28
2019-10-01 17:24:06 +02:00
Radoslaw Biernacki 9a006ad105 qemu: Simplify the image size calculation
Patch introduce the macro NS_IMAGE_MAX_SIZE to simplify the image size
calculation. Use of additional parenthesis removes the possibility of
improper calculations due nested macro expansion for subtraction.
In case of platforms with DRAM window over 32bits, patch also removes
potential problems with type casting, as meminfo.image_size is uint32_t
but macro calculations were done in 64bit space.

Signed-off-by: Radoslaw Biernacki <radoslaw.biernacki@linaro.org>
Change-Id: I2d05a2d9dd6000dba6114df53262995cf85af018
2019-09-18 15:58:13 +02:00
Radoslaw Biernacki 301d27d998 qemu: introducing sub-platforms to qemu platform
This commit change the plat/qemu directory structure into:

`-- plat
    `-- qemu
        |-- common    (files shared with all qemu subplatforms)
        |-- qemu      (original qemu platform)
        |-- qemu_sbsa (new sqemu_sbsa platform)
        |-- subplat1
        `-- subplat2

This opens the possibility of adding new qemu sub-platforms which reuse
existing common platform code. The first platform which will leverage new
structure will be SBSA platform.

Signed-off-by: Radoslaw Biernacki <radoslaw.biernacki@linaro.org>
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Change-Id: Id0d8133e1fffc1b574b69aa2770ebc02bb837a9b
2019-09-18 15:57:17 +02:00