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4 Commits

Author SHA1 Message Date
Siva Durga Prasad Paladugu 3104f2e78d zynqmp: Add support to provide silicon id through SMC 
Add support to provide silicon id to non-secure
software through SMC.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>

[ sb
Move zynqmp_get_silicon_id outside of compile guards to avoid build
errors.
]

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
 2016-09-13 09:19:03 -07:00
Nava kishore Manne 2ddc31dece zynqmp: pm: Implemented pm API functions to load the bitstream into PL 
This patch adds pm_fpga_load() and pm_fpga_get_status() API's to provide
the Access to the xilfpga library to load the bitstream into zynqmp
PL region.

Signed-off-by: Nava kishore Manne <navam@xilinx.com>
 2016-09-13 09:19:03 -07:00
Anes Hadziahmetagic 493541d640 zynqmp: pm: Implemented 'get_op_characteristic' PM API call 
Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com>
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
 2016-05-24 10:18:07 -07:00
Soren Brinkmann c8284409e1 Add support for Xilinx Zynq UltraScale+ MPSOC 
The Xilinx Zynq UltraScale+ MPSOC containes a quad A53 cluster. This
patch adds the platform port for that SoC.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
 2016-04-06 10:44:27 -07:00