Rockchip platform is using the first 1MB of DRAM as secure ram space,
and there is a vendor loader who loads and runs the BL31/BL32/BL33,
this loader is usually load by SoC BootRom to the start addres of DRAM,
we need to reserve enough space for this loader so that it doesn't need
to do the relocate when loading the BL31. eg.
We use U-Boot SPL to load ATF BL31 and U-Boot proper as BL33, the SPL
TEXT BASE is offset 0 of DRAM which is decide by Bootrom; if we update
the BL31_BASE to offset 0x40000(256KB), then the 0~0x40000 should be
enough for SPL and no need to do the relocate while the space size
0x10000(64KB) may not enough for SPL.
After this update, the BL31 can use the rest 768KB of the first 1MB,
which is also enough, and the loader who is using BL31 elf file can
support this update without any change.
Change-Id: I66dc685594d77f10f9a49c3be015fd6729250ece
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The px30 mini-evb can use either uart2 (muxed with the sd-card pins) or
uart5 via its pin header for serial output. Uart5 is especially useful
when needing to boot from the sd-card, where uart2 obviously is not
useable.
So add the uart5 constants and it as uart option for the serial-param
handler.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: Ib88df7a55d761ee104d312c9953a13de3beba1c4
This change is needed for the platform to compile following the changes
made in commits cbdc72b559 and 3e02c7436c.
Change-Id: I3468dd27f3b4f3095fb82f445d51cd8714311eb7
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
"result of '1 << 31' requires 33 bits to represent, but 'int' only has
32 bits [-Werror=shift-overflow=]"
This is treated as an error since commit 93c690eba8 ("Enable
-Wshift-overflow=2 to check for undefined shift behavior")
Only the actual errors are being tackled by this patch. It is up to the
platform to choose whether there needs to be further modifications to
the code.
Change-Id: I70860ae5f2a34d7c684bd491b76da50aa04f778e
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
px30 is a Quad-core soc and Cortex-a53 inside.
This patch supports the following functions:
1. basic platform setup
2. power up/off cpus
3. suspend/resume cpus
4. suspend/resume system
5. reset system
6. power off system
Change-Id: I73d55aa978096c078242be921abe0ddca9e8f67e
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Kever Yang
Heiko Stuebner
Ambroise Vincent
XiaoDong Huang