Commit Graph

39 Commits

Author SHA1 Message Date
Michal Simek bb1768c67e fix(xilinx): fix coding style violations
Fix coding style violations and alignments:
- Remove additional newlines in headers
- Remove additional newlines in code
- Add newline to separate variable from the code
- Use the same indentation in platform.mk
- Align function parameters
- Use tabs for indentation in kernel-doc format

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: I0b12804ff63bc19778e8f21041f9accba5b488b9
2022-03-09 09:14:33 +01:00
Ravi Patel b35b556718 fix(zynqmp): query node status to power up APU
If APU is in suspending state and if wakeup request comes then
PMUFW returns error which is not handled at ATF side.

To fix this, get the APU node status before calling wakeup and
return error if found in suspending state.

Here, we can not handle the error code of pm_req_wakeup() from PMUFW
because ATF is already calling pm_client_wakeup() before calling
pm_req_wakeup().

Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I18d47384e46e22ae49e804093ad0641b7a6349e2
2022-03-02 22:10:57 -08:00
Ronak Jain 223a6284b8 feat(zynqmp): add feature check support
This API returns version of supported APIs.

Here, there are three cases to check API version by using feature
check implementation.

1. Completely implemented in TF-A: I mean the EEMI APIs which are
completely implemented in the TF-A only. So check those IDs and
return appropriate version for the same. Right now, it is base
version.

2. Completely implemented in firmware: I mean the EEMI APIs which are
completely implemented in the firmware only. Here, TF-A only passes
Linux request to the firmware to get the version of supported API. So
check those IDs and send request to firmware to get the version and
return to Linux if the version is supported or return the error code
if the feature is not supported.

3. Partially implemented (Implemented in TF-A and firmware both):
First check dependent EEMI API version with the expected version in
the TF-A. If the dependent EEMI API is supported in firmware then
return its version and check with the expected version in the TF-A.
If the version matches then check for the actual requested EEMI API
version. If the version is supported then return version of API
implemented in TF-A.

Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I73f20d8222c518df1cda7879548b408b130b5b2e
2022-03-02 22:10:26 -08:00
Nava kishore Manne cc077c2227 feat(zynqmp): add support to get info of xilfpga
Adds support to get the xilfpga library version and feature list info.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: Iff10ad2628a6a90230c18dc3aebf9dde89f53ecd
2022-03-02 22:10:04 -08:00
Rajan Vaja 19fe3c7295 zynqmp: pm: Update PM version and support PM version check
ATF is not checking PM version. Add version check in such
a way that it is compatible with current and newer version
of PM.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: Ia095d118121e6f75e8d320e87d5e2018068fa079
2021-01-11 21:34:40 -08:00
Venkatesh Yadav Abbarapu 504925f99d xilinx: zynqmp: Add support for Error Management
Adding the EM specific smc handler for the EM-related requests.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I98122d49604a01a2f6bd1e509a5896ee68069dd0
2021-01-04 11:50:14 +00:00
VNSL Durga 1f91019457 zynqmp:pm: Adds new zynqmp-pm api SMC call for efuse
This patch adds new api to access zynqmp efuse memory

Signed-off-by: VNSL Durga <vnsl.durga.challa@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I0971ab6549552a6f96412431388d19b822db00ab
2021-01-04 11:50:07 +00:00
Kalyani Akula d716f045f2 zynqmp : pm : Adds new zynqmp-pm api SMC call for register access
This patch adds new zynqmp-pm api to provide read/write access to
CSU or PMU global registers.

Signed-off-by: Kalyani Akula <kalyania@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I4fd52eb732fc3e6a8bccd96cad7dc090b2161042
2021-01-04 11:50:02 +00:00
Davorin Mista a8b10c6490 zynqmp: pm: update error codes to match Linux and PMU Firmware
All EEMI error codes start with value 2000.

Note: Legacy error codes ARGS (=1) and NOTSUPPORTED (=4) returned by
current ATF code have been left in place.

Signed-off-by: Davorin Mista <davorin.mista@aggios.com>
Acked-by: Will Wong <WILLW@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: I939afa85957cac88025d82a80f9f6dd49be993b6
2020-11-12 10:27:14 +01:00
Jolly Shah 48dc44e383 zynqmp: pm: Reimplement clock set divider EEMI API
Clock set divider EEMI API is reimplemented to use system-level clock
set divider EEMI API rather than direct MMIO read/write accesses to clock
control registers.

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Acked-by: Will Wong <WILLW@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
2019-01-04 11:51:05 -08:00
Jolly Shah 202797934d zynqmp: pm: Implement PLL get mode EEMI API
This API will be used to get the currently configured PLL mode:
reset (bypassed and unlocked), integer or fractional (locked).

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Acked-by: Will Wong <WILLW@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
2019-01-04 11:36:00 -08:00
Jolly Shah 5f1a5fee52 zynqmp: pm: Implement PLL set mode EEMI API
This API will be used to set the PLL mode: reset (unlocked), integer
or fractional (locked). If reset mode is set the PM controller will
bypass the target PLL prior to asserting the reset. If integer or
fractional mode is set the PM controller will program and trigger
locking of the PLL. If success status is returned the PLL is locked
and its bypass is deasserted. If fractional mode is set the fractional
divider (data parameter) has to have a non-zero value prior to issuing
pll set fractional mode. The caller need to ensure that the data
parameter is properly set using pll get/set parameter EEMI API.

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Acked-by: Will Wong <WILLW@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
2019-01-04 11:33:56 -08:00
Jolly Shah d833f64c90 zynqmp: pm: Implement PLL get parameter EEMI API
This API will be used to get a parameter for the PLL. Parameter values
represent the values as defined in the Zynq MPSoC register reference
manual ug1087.

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Acked-by: Will Wong <WILLW@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
2019-01-04 11:30:31 -08:00
Jolly Shah bfed44a171 zynqmp: pm: Implement PLL set parameter EEMI API
This API will be used to set a parameter for the PLL. The parameter
value that is set will have effect once the PLL mode is set to integer
or fractional mode. Parameter values represent the values as defined
in the Zynq MPSoC register reference manual ug1087.

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Acked-by: Will Wong <WILLW@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
2019-01-04 11:13:41 -08:00
Antonio Nino Diaz c3cf06f1a3 Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.

The style that this project is now to use the full name of the file in
capital letters followed by 'H'. For example, for a file called
"uart_example.h", the header guard is UART_EXAMPLE_H.

The exceptions are files that are imported from other projects:

- CryptoCell driver
- dt-bindings folders
- zlib headers

Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-11-08 10:20:19 +00:00
Siva Durga Prasad Paladugu db48453493 zynqmp: Add ATF support for Data blob encryption and decryption
This patch adds ATF support for AES data blob encrypt/decrypt.
ATF establishes a path to send the address of the structure
to the xilsecure, so that it will pick addresses of the data
and performs the requested operation (encrypt/decrypt) and puts
the result in load address.

where structure contains
- Data blob src address
- load address
- IV address
- Key address - this will actual key addr in case of KUP
		else it will be zero.
- Data-size
- Aes-op type
- KeySrc

Signed-off-by: Kalyani Akula <kalyani.akula@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
2018-09-04 18:05:50 +05:30
Siva Durga Prasad Paladugu 26a754f6ad zynqmp: Add new API for pl configuration readback
This patch adds new API's for performing pl configuration
readback.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
2018-09-04 17:41:34 +05:30
Siva Durga Prasad Paladugu 5479fa704b zynqmp: Add new API for processing secure images
This patch adds new API for processing secure images. This API
is used for authentication and decryption of secure images using
xilsecure in pmufw.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
2018-05-17 15:19:19 +05:30
Siva Durga Prasad Paladugu 61ef376aa2 zynqmp: pm: Allow to set shutdown scope via pm_system_shutdown API
psci system_reset and system_off calls now retrieve shutdown scope on
the fly. The default scope is system, but it can be changed by calling
pm_system_shutdown(2, scope)

Until full support for different restart scopes becomes available with
PSCI 1.1 this change allows users to set the reboot scope to match
their application needs.

Possible scope values:
0 - APU subsystem: does not affect RPU, PMU or PL
1 - PS only: shutdown/restart entire PS without affecting PL
2 - System: shutdown/restart applies to entire system

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Davorin Mista <davorin.mista@aggios.com>
2018-05-17 15:12:44 +05:30
Filip Drazic 0484967207 zynqmp: pm: Rename PM_INIT to PM_INIT_FINALIZE
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
2018-05-17 15:12:19 +05:30
Mirela Simonovic c496f5af54 zynqmp: pm: Remove unused NODE_AFI, add NODE_EXTERN
NODE_EXTERN is the slave node which represents an external wake
source.

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Acked-by: Will Wong <willw@xilinx.com>
2018-05-17 15:11:44 +05:30
Jolly Shah 96d6986566 zynqmp: pm: Update API version to 1.0
With new EEMI APIs addition, version is updated to 1.0

Signed-off-by: Jolly Shah <jollys@xilinx.com>
2018-03-15 10:24:04 -07:00
Rajan Vaja caae497dfc zynqmp: pm: Add clock control EEMI API and ioctl functions
These are empty functions with no logic right now. Code
will be added in subsequent commits.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
2018-03-15 10:23:41 -07:00
Rajan Vaja f76918a806 zynqmp: pm: Implement IOCTL APIs for remoteproc
Implement ioctl APIs which uses MMIO operations
to control RPU operations. Below IOCTLs are supported
in this patch:
  * Get RPU operation mode
  * Set RPU operation mode
  * Configure RPU boot address (OCM/TCM)
  * Configure TCM combined mode

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
2018-03-15 10:23:31 -07:00
Rajan Vaja e52e10add2 zynqmp: pm: Implement pin control APIs for get/set functions
Implement pin control APIs which uses MMIO operations
to set/get functions for the given pin.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
2018-03-15 10:23:22 -07:00
Rajan Vaja 849ba7f730 zynqmp: pm: Add wrappers for Pin control APIs
Add wrappers for pin control APIs. Actual implementation of
these APIs would be done in subsequent changes.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
2018-03-15 10:23:17 -07:00
Rajan Vaja f61262ac62 zynqmp: Add new function and node IDs
Add new function and node IDs supported by PMUFW in
function list and node list respectively.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
2018-03-15 10:23:12 -07:00
dp-arm 82cb2c1ad9 Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.

NOTE: Files that have been imported by FreeBSD have not been modified.

[0]: https://spdx.org/

Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-05-03 09:39:28 +01:00
Soren Brinkmann 8353170321 zynqmp: PM: Migrate to new shutdown interface
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2016-11-16 15:48:48 -08:00
Siva Durga Prasad Paladugu 3104f2e78d zynqmp: Add support to provide silicon id through SMC
Add support to provide silicon id to non-secure
software through SMC.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>

[ sb
Move zynqmp_get_silicon_id outside of compile guards to avoid build
errors.
]

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2016-09-13 09:19:03 -07:00
Nava kishore Manne 2ddc31dece zynqmp: pm: Implemented pm API functions to load the bitstream into PL
This patch adds pm_fpga_load() and pm_fpga_get_status() API's to provide
the Access to the xilfpga library to load the bitstream into zynqmp
PL region.

Signed-off-by: Nava kishore Manne <navam@xilinx.com>
2016-09-13 09:19:03 -07:00
Nava kishore Manne f7d4bfc2bf zynqmp: pm: adds new pm ID to sync with PMUFW ID numbers
This patch adds a new pm ID to sync with PMUFW ID numbers.

Signed-off-by: Nava kishore Manne <navam@xilinx.com>
2016-09-13 09:19:03 -07:00
Filip Drazic b516b7dc5d zynqmp: pm: Call set_wakeup_source for all wake devices on sys-suspend
During system suspend, identify slaves which are configured
as wake sources and call pm_set_wakeup_source API for each of them.

Identifying if device may wake the system is done by checking if any
interrupt of that device is enabled in GICD_ISENABLER when the APU is
about to enter SUSPEND_TO_RAM state. If such interrupt is found,
pm_set_wakeup_source is called with corresponding PM node ID as
argument.

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
2016-09-13 09:19:03 -07:00
Filip Drazic 6aa4c533b8 zynqmp: pm: Add PM node IDs for GPU, PCIE, PCAP and RTC
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
2016-09-13 09:19:03 -07:00
Filip Drazic 95fd990fe6 zynqmp: pm: Provide state argument to the pm_self_suspend API call
The state argument of the pm_self_suspend API encodes the state to
which the APU intends to suspend. The state can be:
- PM_APU_STATE_CPU_IDLE - processor power down, all memories remain
  on
- PM_APU_STATE_SUSPEND_TO_RAM - all processors powered down, L2$
  powered down, all OCM banks in retention and DDR in
  self-refresh.
The calls for setting requirements for L2$ and OCM banks are now
redundant and removed.

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
[ sb
 - remove redundant #defines
]
Signed-off-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
2016-09-13 09:19:03 -07:00
Mirela Simonovic 2c239f7c2a zynqmp: pm: Added NODE_IPI_RPU_0 node definition in pm_defs
Nodes represent IPI dedicated to the RPU (not accessible by APU)

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
2016-09-13 09:19:02 -07:00
Mirela Simonovic 2ba6895919 zynqmp: pm: Added NODE_IPI_APU slave node ID in pm_defs.h
NODE_IPI_APU is the node ID of APU's IPI device. If APU should be
woken-up on an IPI from FPD power down, this node shall be set as
the wake-up source upon suspend.

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
2016-06-07 13:30:37 -07:00
Anes Hadziahmetagic 493541d640 zynqmp: pm: Implemented 'get_op_characteristic' PM API call
Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com>
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2016-05-24 10:18:07 -07:00
Soren Brinkmann c8284409e1 Add support for Xilinx Zynq UltraScale+ MPSOC
The Xilinx Zynq UltraScale+ MPSOC containes a quad A53 cluster. This
patch adds the platform port for that SoC.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2016-04-06 10:44:27 -07:00