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2 Commits

Author SHA1 Message Date
Stefan Krsmanovic 03b8077309 zynqmp: Add bakery_lock to protect APU_PWRCTRL register access 
Access to APU_PWRCTRL register is protected during suspend/wakeup pocedure
in order to save valid state. If more than one CPU is accessing this register
it can be left in corrupted state during read-modify-write process.

Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
 2016-05-24 10:18:07 -07:00
Soren Brinkmann c8284409e1 Add support for Xilinx Zynq UltraScale+ MPSOC 
The Xilinx Zynq UltraScale+ MPSOC containes a quad A53 cluster. This
patch adds the platform port for that SoC.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
 2016-04-06 10:44:27 -07:00