Commit Graph

1206 Commits

Author SHA1 Message Date
Achin Gupta 4a826ddad8 rework general purpose registers save and restore
The runtime exception handling assembler code used magic numbers for
saving and restoring the general purpose register context on stack
memory. The memory is interpreted as a 'gp_regs' structure and the
magic numbers are offsets to members of this structure. This patch
replaces the magic number offsets with constants. It also adds compile
time assertions to prevent an incorrect assembler view of this
structure.

Change-Id: Ibf125bfdd62ba3a33e58c5f1d71f8c229720781c
2013-12-05 12:28:50 +00:00
Dan Handley ab2d31edbd Enable third party contributions
- Add instructions for contributing to ARM Trusted Firmware.

- Update copyright text in all files to acknowledge contributors.

Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
2013-12-05 11:34:09 +00:00
Sandrine Bailleux 65f546a14f Properly initialise the C runtime environment
This patch makes sure the C runtime environment is properly
initialised before executing any C code.

  - Zero-initialise NOBITS sections (e.g. the bss section).
  - Relocate BL1 data from ROM to RAM.

Change-Id: I0da81b417b2f0d1f7ef667cc5131b1e47e22571f
2013-12-05 11:33:15 +00:00
Sandrine Bailleux 295538bc37 AArch64: Remove EL-agnostic TLB helper functions
Also, don't invalidate the TLBs in disable_mmu() function, it's better
to do it in enable_mmu() function just before actually enabling the
MMU.

Change-Id: Ib32d6660019b0b2c17254156aad4be67ab4970e1
2013-11-27 15:31:06 +00:00
Sandrine Bailleux 3738274dc1 Unmask SError and Debug exceptions.
Any asynchronous exception caused by the firmware should be handled
in the firmware itself.  For this reason, unmask SError exceptions
(and Debug ones as well) on all boot paths.  Also route external
abort and SError interrupts to EL3, otherwise they will target EL1.

Change-Id: I9c191d2d0dcfef85f265641c8460dfbb4d112092
2013-11-27 15:31:06 +00:00
Achin Gupta 4f6ad66ae9 ARMv8 Trusted Firmware release v0.2 2013-10-25 09:37:16 +01:00